Patents by Inventor Yamato Ishikawa

Yamato Ishikawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6294446
    Abstract: A high electron mobility transistor includes a channel layer for developing therein an electron gas layer having a substantially uniform electron gas density, and upper and lower high-resistance wide-band gap layers disposed respective over and beneath the channel layer, each of the upper and lower high-resistance wide-band gap layers having a silicon-doped planar layer disposed therein. A contact layer is disposed on the upper wide-band gap layer for contact with source and drain electrodes, the contact layer having a recess defined therein which divides the contact tact layer. A gate electrode of substantially T-shaped cross section is disposed in the recess, and a passivation film is disposed on an inner wall surface of the recess and a lower leg portion of the gate electrode, exposing an upper head portion of the gate electrode.
    Type: Grant
    Filed: May 22, 2000
    Date of Patent: September 25, 2001
    Assignee: Honda Giken Kogyo Kabushiki Kaisha
    Inventor: Yamato Ishikawa
  • Patent number: 6188013
    Abstract: A solar cell comprising a substrate of insulating material, a bottom side electrode layer formed on one surface of the substrate, a semiconductor photoelectric conversion layer formed on the bottom side electrode layer, a transparent top side electrode layer formed on the semiconductor photoelectric conversion layer and a non-transparent electrode comprising a plurality of strips of non-transparent conductive layers disposed separately from each other on the top side transparent electrode layer. The solar cell further comprises an additional bottom side electrode layer formed on the opposite surface of the substrate and a plurality of conductive paths connecting the bottom side electrode layer to the additional bottom side electrode layer through holes or slits formed to penetrate the substrate.
    Type: Grant
    Filed: May 28, 1999
    Date of Patent: February 13, 2001
    Assignee: Honda Giken Kogyo Kabushiki Kaisha
    Inventors: Atsushi Inaba, Katsuhiko Takebe, Yamato Ishikawa
  • Patent number: 6020556
    Abstract: A solar cell comprising a substrate of insulating material, a bottom side electrode layer formed on one surface of the substrate, a semiconductor photoelectric conversion layer formed on the bottom side electrode layer, a transparent top side electrode layer formed on the semiconductor photoelectric conversion layer and a non-transparent electrode comprising a plurality of strips of non-transparent conductive layers disposed separately from each other on the top side transparent electrode layer. The solar sell further comrises an additional bottom side electrode layer formed on the opposite surface of the substrate and a plurality of conductive paths for electrically connecting the bottom the electrode layer to said additional bottom side electrode layer through holes or slits formed to penetrate the substrate. Each of the strips of the non-transparent conductive layers is located just above each of the conductive paths, respectively.
    Type: Grant
    Filed: May 28, 1999
    Date of Patent: February 1, 2000
    Assignee: Honda Giken Kogyo Kabushiki Kaisha
    Inventors: Atsushi Inaba, Yamato Ishikawa
  • Patent number: 5945693
    Abstract: A field-effect transistor has a channel layer of InGaAs, and a pair of wide bandgap layers disposed one on each side of the channel layer, with respective heterojunctions formed with the channel layer. The channel layer has a thickness ranging from 50 to 150 angstroms, which is substantially the same as two-dimensional electron gas layers that are formed in the channel layer. The wide bandgap layers have the same composition, and the same concentration of an impurity.
    Type: Grant
    Filed: November 30, 1995
    Date of Patent: August 31, 1999
    Assignee: Honda Giken Kogyo Kabushiki Kaisha
    Inventors: Toshifumi Suzuki, Yamato Ishikawa
  • Patent number: 5900653
    Abstract: A high electron mobility transistor has a double-heterojunction structure including a channel layer for developing therein an electron gas layer having a substantially uniform electron gas density, and upper and lower high-resistance wide-band gap layers disposed respectively over and beneath the channel layer. Each of the upper and lower high-resistance wide-band gap layers has a silicon-doped planar layer disposed therein. The upper high-resistance wide-band gap layer including a low-resistance wide-band gap layer disposed in an upper end region thereof remotely from the channel layer.
    Type: Grant
    Filed: April 15, 1997
    Date of Patent: May 4, 1999
    Assignee: Honda Giken Kogyo Kabushiki Kaisha
    Inventors: Toshifumi Suzuki, Yamato Ishikawa
  • Patent number: 5776820
    Abstract: A method of forming a T-type gate electrode of a high-frequency transistor having excellent high-frequency power transfer characteristic with no concave portions and protrusions. A first resist pattern having a first relatively narrow opening is formed on a semiconductor substrate and a leg portion of the electrode is formed in the first opening by depositing electrode metal on the substrate. A second resist pattern having a second relatively wide opening is formed over the electrode leg portion for locating an exposed tip of the electrode leg portion in the bottom of the second opening and forming a head portion of the electrode by depositing electrode metal in the second opening. The head portion is etched for removing any protrusions formed on the head portion.
    Type: Grant
    Filed: January 19, 1996
    Date of Patent: July 7, 1998
    Assignee: Honda Giken Kogyo Kabushiki Kaisha
    Inventors: Tomoyuki Kamiyama, Yamato Ishikawa