Patents by Inventor Yamin Du

Yamin Du has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12237004
    Abstract: An output driver includes a pullup driver, a pulldown driver and a resistive element. The pullup driver includes a first PMOS transistor having a source coupled to a first supply voltage and a gate receiving a first data representative of a transmitted data, and a second PMOS transistor having a source coupled to a drain of the first PMOS transistor and a gate receiving a first analog signal. The pulldown driver includes a first NMOS transistor having a source coupled to a second supply voltage and a gate receiving a second data representative of the transmitted data, and a second NMOS transistor having a source coupled to a drain of the first NMOS transistor, a drain coupled to a drain of the second PMOS transistor, and a gate receiving a second analog signal. The resistive element is coupled between the drain terminal of the second NMOS transistor and a pad.
    Type: Grant
    Filed: August 26, 2022
    Date of Patent: February 25, 2025
    Assignee: Synopsys, Inc.
    Inventors: Yamin Du, Vladimir Zlatkovic, Alex Alexeyev, De Zhong Cheng
  • Patent number: 8344760
    Abstract: A circuit includes an input/output buffer circuit. The input/output buffer circuit includes an output buffer circuit and a bias control circuit. The output buffer circuit provides an output voltage in response to output information. The bias control circuit provides an output buffer bias voltage based on the output voltage.
    Type: Grant
    Filed: July 17, 2009
    Date of Patent: January 1, 2013
    Assignee: ATI Technologies ULC
    Inventors: Yamin Du, Oleg Drapkin, Grigori Temkine
  • Patent number: 8188615
    Abstract: An integrated circuit is adapted to be selectively AC or DC coupled to an external device at a coupling point. The integrated circuit includes a first connector connected to the coupling point by way of a coupling capacitor for AC coupling, a second connector connected to the coupling point for DC coupling, and a switch to selectively short the first and second connectors and thereby the coupling capacitor, when the integrated circuit is DC coupled to the device. The switch may be a MOSFET bridge comprising a switch control MOSFET interconnected between the first and second connectors, with the switch control MOSFET receiving at its gate a mode status signal for turning on the switch control MOSFET and thereby shorting the MOSFET bridge when the integrated circuit is DC coupled to the external device.
    Type: Grant
    Filed: September 18, 2009
    Date of Patent: May 29, 2012
    Assignee: ATI Technologies ULC
    Inventors: Yamin Du, Richard Fung, Pouya Ashtiani
  • Publication number: 20110068632
    Abstract: An integrated circuit is adapted to be selectively AC or DC coupled to an external device at a coupling point. The integrated circuit includes a first connector connected to the coupling point by way of a coupling capacitor for AC coupling, a second connector connected to the coupling point for DC coupling, and a switch to selectively short the first and second connectors and thereby the coupling capacitor, when the integrated circuit is DC coupled to the device. The switch may be a MOSFET bridge comprising a switch control MOSFET interconnected between the first and second connectors, with the switch control MOSFET receiving at its gate a mode status signal for turning on the switch control MOSFET and thereby shorting the MOSFET bridge when the integrated circuit is DC coupled to the external device.
    Type: Application
    Filed: September 18, 2009
    Publication date: March 24, 2011
    Applicant: ATI Technologies ULC
    Inventors: Yamin Du, Richard Fung, Pouya Ashtiani
  • Publication number: 20100176848
    Abstract: A circuit includes an input/output buffer circuit. The input/output buffer circuit includes an output buffer circuit and a bias control circuit. The output buffer circuit provides an output voltage in response to output information. The bias control circuit provides an output buffer bias voltage based on the output voltage.
    Type: Application
    Filed: July 17, 2009
    Publication date: July 15, 2010
    Applicant: ATI Technologies ULC
    Inventors: Yamin Du, Oleg Drapkin, Grigori Temkine