Patents by Inventor Yanbin Jiang
Yanbin Jiang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240133144Abstract: A method for reinforcing soft ground by post-grouting combined with pressurized vacuum preloading is proposed, by pre-burying prefabricated vertical drains and air-boosted pipes in granular material piles, and the air-boosted pipes are used as grouting pipes to reduce the number of times of piling, which not only improves the construction efficiency, but also reduces the structural disturbance of the soil and the influence of smear effect, thus reducing the impact on the radial permeability and the radial consolidation coefficients. The method does not use geotextile bags for granular materials, which can avoid the problem of forming a localized clogging area around the geotextile bags, and the method not only improves the efficiency of vacuum transfer in a pre-consolidation stage, but also improves the grouting effect in the later stage, effectively enhances the strength of soft soil and makes granular material piles and the surrounding soil form composite ground.Type: ApplicationFiled: October 23, 2023Publication date: April 25, 2024Inventors: Binhua Xu, Ning He, Yanbin Jiang, Zhangchun Wang, Zhikun Yan, Yanzhang Zhou, Guirong Zhang, Yajun Qian, Xinjie Zhan, Zhongliu Zhang, Bin He, Denghua Li, Yang Kong, Yuting Xie, Xiang Yin
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Publication number: 20240098011Abstract: The present disclosure relates to the technical field of Internet, in particular to a method for measuring network international outlet interfaces of a designated area. The method includes the following steps: acquiring a designated collection of routing interface paths and area location information of IP addresses of routing interface nodes; dividing the collected routing interface paths into critical hop complete paths and critical hop missing paths; determining whether a routing interface path is a critical hop complete path; using a 2-tuple to identify network international outlet interfaces of the routing interface path; and counting the quantity of the network international outlet interfaces of the measured area.Type: ApplicationFiled: July 12, 2023Publication date: March 21, 2024Inventors: Yu JIANG, Binxing FANG, Yanbin SUN, Zhihong TIAN, Mohan LI, Deshun ZENG
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Publication number: 20240082306Abstract: Provided is a chimeric antigen receptor, comprising an antigen binding region, a transmembrane domain and an intracellular signaling region. The antigen binding region comprises an antibody specifically targeting CD7, and the intracellular signaling region consists of a co-stimulatory domain, a primary signal transduction domain, and a ?C chain or intracellular region thereof. Also provided are an engineered immune cell comprising the chimeric antigen receptor and a pharmaceutical composition thereof, and use of the engineered immune cell/pharmaceutical composition for treating cancers.Type: ApplicationFiled: December 7, 2021Publication date: March 14, 2024Applicant: BIOHENG THERAPEUTICS LIMITEDInventors: Yali ZHOU, Gong CHEN, Tingting GUO, Xiaoyan JIANG, Jiangtao REN, Xiaohong HE, Yanbin WANG, Lu HAN
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Patent number: 11720808Abstract: The disclosed embodiments provide a system for streamlining machine learning. During operation, the system determines a resource overhead for a baseline version of a machine learning model that uses a set of features to produce entity rankings and a number of features to be removed to lower the resource overhead to a target resource overhead. Next, the system calculates importance scores for the features, wherein each importance score represents an impact of a corresponding feature on the entity rankings. The system then identifies a first subset of the features to be removed as the number of features with lowest importance scores and trains a simplified version of the machine learning model using a second subset of the features that excludes the first subset of the features. Finally, the system executes the simplified version to produce new entity rankings.Type: GrantFiled: May 28, 2020Date of Patent: August 8, 2023Assignee: Microsoft Technology Licensing, LLCInventors: Yen-Jung Chang, Yunsong Meng, Tie Wang, Yang Yang, Bo Long, Boyi Chen, Yanbin Jiang, Zheng Li
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Publication number: 20220188358Abstract: Described herein are techniques for processing content items for presentation via a content feed of an online service. Upon receiving a request associated with a particular end-user of an online service for a content feed, a connection graph is analyzed to identify a plurality of content items that are eligible for presentation to the end-user. Some subset of content items that share a common relationship with the end-user, as indicated by a common edge in the connection graph, are identified. This subset of content items is then grouped together for presentation within the content feed in a content carousel, where the content carousel is positioned within the content feed, relative to other content items, based on the highest ranking content item presented via the content carousel.Type: ApplicationFiled: December 10, 2020Publication date: June 16, 2022Inventors: James Hung, Samson Hin-Leung CHOI, Fangbing QIU, Collin Dang YEN, Heyang LIU, Xiang LIN, Garrett Gabriel WELSON, Kangning HU, Ying XUAN, Yanbin JIANG, Diya Dutt SHARMA, Manas Haribhai SOMAIYA
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Patent number: 11204847Abstract: Technologies for monitoring performance of a machine learning model include receiving, by an unsupervised anomaly detection function, digital time series data for a feature metric; where the feature metric is computed for a feature that is extracted from an online system over a time interval; where the machine learning model is to produce model output that relates to one or more users' use of the online system; using the unsupervised anomaly detection function, detecting anomalies in the digital time series data; labeling a subset of the detected anomalies in response to a deviation of a time-series prediction model from a predicted baseline model exceeding a predicted deviation criterion; creating digital output that identifies the feature as associated with the labeled subset of the detected anomalies; causing, in response to the digital output, a modification of the machine learning model.Type: GrantFiled: December 21, 2018Date of Patent: December 21, 2021Assignee: Microsoft Technology Licensing, LLCInventors: Kexin Nie, Yanbin Jiang, Yang Yang, Boyi Chen, Shilpa Gupta, Zheng Li
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Publication number: 20210374562Abstract: The disclosed embodiments provide a system for streamlining machine learning. During operation, the system determines a resource overhead for a baseline version of a machine learning model that uses a set of features to produce entity rankings and a number of features to be removed to lower the resource overhead to a target resource overhead. Next, the system calculates importance scores for the features, wherein each importance score represents an impact of a corresponding feature on the entity rankings. The system then identifies a first subset of the features to be removed as the number of features with lowest importance scores and trains a simplified version of the machine learning model using a second subset of the features that excludes the first subset of the features. Finally, the system executes the simplified version to produce new entity rankings.Type: ApplicationFiled: May 28, 2020Publication date: December 2, 2021Inventors: Yen-Jung Chang, Yunsong Meng, Tie Wang, Yang Yang, Bo Long, Boyi Chen, Yanbin Jiang, Zheng Li
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Publication number: 20200201727Abstract: Technologies for monitoring performance of a machine learning model include receiving, by an unsupervised anomaly detection function, digital time series data for a feature metric; where the feature metric is computed for a feature that is extracted from an online system over a time interval; where the machine learning model is to produce model output that relates to one or more users' use of the online system; using the unsupervised anomaly detection function, detecting anomalies in the digital time series data; labeling a subset of the detected anomalies in response to a deviation of a time-series prediction model from a predicted baseline model exceeding a predicted deviation criterion; creating digital output that identifies the feature as associated with the labeled subset of the detected anomalies; causing, in response to the digital output, a modification of the machine learning model.Type: ApplicationFiled: December 21, 2018Publication date: June 25, 2020Inventors: Kexin Nie, Yanbin Jiang, Yang Yang, Boyi Chen, Shilpa Gupta, Zheng Li
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Patent number: 10083269Abstract: A computer implemented system and method is provided for generating a layout of the cell defining a circuit component, the layout providing a layout pattern for a target process technology. The method comprises obtaining an archetype layout providing a valid layout pattern for the cell having regard to design rules of the target process technology, and receiving an input data file providing a process technology independent schematic of the circuit component for which the cell is to be generated. A schematic sizing operation is then performed on the input data file, having regard to both schematic constraints applicable to the target process technology and layout constraints derived from the archetype layout, in order to generate an output data file providing a process technology dependent schematic of the circuit component. A cell generation operation is then performed using the output data file and layout data determined from the archetype layout in order to generate the layout of the cell.Type: GrantFiled: October 30, 2014Date of Patent: September 25, 2018Assignee: ARM LimitedInventors: Paul De Dood, Marlin Wayne Frederick, Jerry Chaoyuan Wang, Brian Douglas Ngai Lee, Brian Tracy Cline, Xiaoqing Xu, Andy Wangkun Chen, Yew Keong Chong, Tom Shore, Sriram Thyagarajan, Gus Yeung, Yanbin Jiang, Emmanuel Jean Marie Olivier Pacaud, Matthieu Domonique Henri Pauly, Sylvia Xiuhui Li, Thanusree Achuthan, Daniel J. Albers, David William Granda
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Publication number: 20180225402Abstract: A computer implemented system and method is provided for generating a layout of the cell defining a circuit component, the layout providing a layout pattern for a target process technology. The method comprises obtaining an archetype layout providing a valid layout pattern for the cell having regard to design rules of the target process technology, and receiving an input data file providing a process technology independent schematic of the circuit component for which the cell is to be generated. A schematic sizing operation is then performed on the input data file, having regard to both schematic constraints applicable to the target process technology and layout constraints derived from the archetype layout, in order to generate an output data file providing a process technology dependent schematic of the circuit component. A cell generation operation is then performed using the output data file and layout data determined from the archetype layout in order to generate the layout of the cell.Type: ApplicationFiled: October 30, 2014Publication date: August 9, 2018Inventors: Paul DE DOOD, Marlin Wayne Frederick, JR., Jerry Chaoyuan Wang, Brian Douglas Ngai Lee, Brian Tracy Cline, Xiaoqing Xu, Andy Wangkun Chen, Yew Keong Chong, Tom Shore, Sriram Thyagarajan, Gus Yeung, Yanbin Jiang, Emmanuel Jean Marie Olivier Pacaud, Matthieu Domonique Henri Pauly, Sylvia Xiuhui Li, Thanusree Achuthan, Daniel J. Albers, David William Granda
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Patent number: 9350569Abstract: Embodiments of the present invention provide a method and an apparatus for reconstructing data. The method includes: acquiring a self-correlation function of a root raised cosine filter coefficient and a fading factor of each antenna of channel estimation; constructing an L-dimension matrix of the self-correlation function according to the antenna; processing a result of superposing the L-dimension matrix of the self-correlation function and the fading factor of each antenna to obtain an estimate value of an actual fading factor of the each antenna; and reconstructing received data according to the estimate value of the actual fading factor to obtain reconstructed data used for cancellation. In the embodiments of the present invention, a process of performing interference cancellation for data reconstruction is closer to an actual sending process and closer to an originally sent signal, thereby improving cancellation efficiency and reducing interference.Type: GrantFiled: January 27, 2014Date of Patent: May 24, 2016Assignee: HUAWEI TECHNOLOGIES CO., LTD.Inventors: Na Jiang, Yanbin Jiang
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Publication number: 20140140383Abstract: Embodiments of the present invention provide a method and an apparatus for reconstructing data. The method includes: acquiring a self-correlation function of a root raised cosine filter coefficient and a fading factor of each antenna of channel estimation; constructing an L-dimension matrix of the self-correlation function according to the antenna; processing a result of superposing the L-dimension matrix of the self-correlation function and the fading factor of each antenna to obtain an estimate value of an actual fading factor of the each antenna; and reconstructing received data according to the estimate value of the actual fading factor to obtain reconstructed data used for cancellation. In the embodiments of the present invention, a process of performing interference cancellation for data reconstruction is closer to an actual sending process and closer to an originally sent signal, thereby improving cancellation efficiency and reducing interference.Type: ApplicationFiled: January 27, 2014Publication date: May 22, 2014Applicant: Huawei Technologies Co., Ltd.Inventors: Na JIANG, Yanbin Jiang
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Publication number: 20120111058Abstract: One objective of the present invention was to provide a method of continuously forming crystallized glass, so as to reduce the thermal treatment time necessary for crystallizing a belt-shaped glass plate; and to provide an apparatus of continuously forming crystallized glass, so as to shorten the thermal treatment zone necessary for crystallizing a belt-shaped glass plate. A method of continuously forming crystallized glass according to the present invention includes: a melting step of melting a raw glass material to obtain molten glass; a shaping step of rolling the molten glass to form a belt-shaped glass plate; a crystallizing step of retaining the belt-shaped glass plate at a temperature necessary for nuclei formation and crystal growth, thereby forming nuclei and crystallizing the belt-shaped glass plate to a belt-shaped crystallized glass plate, and then slowly cooling the belt-shaped crystallized glass plate; and a cutting step of cutting the belt-shaped crystallized glass plate.Type: ApplicationFiled: September 20, 2011Publication date: May 10, 2012Applicants: Ta Hsiang Containers Ind. Co., Ltd., Huzhou Ta Hsiang Glass Products Co., Ltd.Inventors: Kuo-Chuan Hsu, Yanbin Jiang
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Patent number: 8087314Abstract: A powdery/granular material flowability evaluation apparatus and a powdery/granular material flowability evaluation method are provided to evaluate the flowability of a powdery/granular material in a dynamic state of the powdery/granular material. The powdery/granular material flowability evaluation apparatus (A) has a hopper (111) for storing a powdery/granular material to be measured, a vertical tube (11) having a flow-in port (1121) connected with a discharge port (1112) of the hopper (111) through which the powdery/granular material is discharged, a vibrator (2) for giving vibration to the tube (11), a laser vibrometer (3) for measuring the amplitude of the tube (11), an electric balance (4) for measuring the weight of the powdery/granular material fallen through the tube 11 from the hopper (111), and an evaluation value calculating section (512) for calculating an evaluation value evaluating the flowability of the powdery/granular material based on the measured amplitude and weight.Type: GrantFiled: February 16, 2010Date of Patent: January 3, 2012Assignee: Kyoto UniversityInventors: Shuji Matsusaka, Hiroaki Masuda, Yanbin Jiang, Masatoshi Yasuda
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Patent number: 7784370Abstract: A powdery/granular material flowability evaluation apparatus and a powdery/granular material flowability evaluation method are provided to evaluate the flowability of a powdery/granular material in a dynamic state of the powdery/granular material. The powdery/granular material flowability evaluation apparatus (A) has a hopper (111) for storing a powdery/granular material to be measured, a vertical tube (11) having a flow-in port (1121) connected with a discharge port (1112) of the hopper (111) through which the powdery/granular material is discharged, a vibrator (2) for giving vibration to the tube (11), a laser vibrometer (3) for measuring the amplitude of the tube (11), an electric balance (4) for measuring the weight of the powdery/granular material fallen through the tube 11 from the hopper (111), and an evaluation value calculating section (512) for calculating an evaluation value evaluating the flowability of the powdery/granular material based on the measured amplitude and weight.Type: GrantFiled: April 19, 2006Date of Patent: August 31, 2010Assignee: Kyoto UniversityInventors: Shuji Matsusaka, Hiroaki Masuda, Yanbin Jiang, Masatoshi Yasuda
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Publication number: 20100153028Abstract: A powdery/granular material flowability evaluation apparatus and a powdery/granular material flowability evaluation method are provided to evaluate the flowability of a powdery/granular material in a dynamic state of the powdery/granular material. The powdery/granular material flowability evaluation apparatus (A) has a hopper (111) for storing a powdery/granular material to be measured, a vertical tube (11) having a flow-in port (1121) connected with a discharge port (1112) of the hopper (111) through which the powdery/granular material is discharged, a vibrator (2) for giving vibration to the tube (11), a laser vibrometer (3) for measuring the amplitude of the tube (11), an electric balance (4) for measuring the weight of the powdery/granular material fallen through the tube 11 from the hopper (111), and an evaluation value calculating section (512) for calculating an evaluation value evaluating the flowability of the powdery/granular material based on the measured amplitude and weight.Type: ApplicationFiled: February 16, 2010Publication date: June 17, 2010Applicant: KYOTO UNIVERSITYInventors: Shuji Matsusaka, Hiroaki Masuda, Yanbin Jiang, Masatoshi Yasuda
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Publication number: 20090078029Abstract: The present invention aims to provide a powdery/granular material flowability evaluation apparatus and a powdery/granular material flowability evaluation method capable of evaluating the flowability of a powdery/granular material in a dynamic state of the powdery/granular material.Type: ApplicationFiled: April 19, 2006Publication date: March 26, 2009Applicant: KYOTO UNIVERSITYInventors: Shuji Matsusaka, Hiroaki Masuda, Yanbin Jiang, Masatoshi Yasuda
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Patent number: 6968524Abstract: A method and system are disclosed to optimize an integrated circuit layout design by determining possible lengths of layout rows that will reduce the total area of the integrated circuit layout (FIG. 4B). The possible row lengths (401B) are determined and stored in a memory unit as a set of possible optimal row length values. A set of possible optimal row heights corresponding to the determined set of possible rowlengths is determined and the total chip area is iteratively calculated. Optimal values of rowlength and row height are chosen based upon the maximum chip area reduction. Once the optimal row length and height parameters are chosen, transistor devices placed in each row of the integrated circuit layout are folded to achieve the optimal row length and height.Type: GrantFiled: March 30, 2001Date of Patent: November 22, 2005Assignee: Cadence Design Systems, Inc.Inventors: Yanbin Jiang, Ilhami Torunoglu, Cyrus Bamji
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Publication number: 20040010765Abstract: A method and system are disclosed to optimize an integrated circuit layout design by determining possible lengths of layout rows that will reduce the total area of the integrated circuit layout (FIG. 4B). The possible row lengths (401B) are determined and stored in a memory unit as a set of possible optimal row length values. A set of possible optimal row heights corresponding to the determined set of possible rowlengths is determined and the total chip area is iteratively calculated. Optimal values of rowlength and row height are chosen based upon the maximum chip area reduction. Once the optimal row length and height parameters are chosen, transistor devices placed in each row of the integrated circuit layout are folded to achieve the optimal row length and height.Type: ApplicationFiled: May 28, 2003Publication date: January 15, 2004Inventors: Yanbin Jiang, Ilhami Torunoglu, Cyrus Bamji