Patents by Inventor Yan Ji

Yan Ji has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11974482
    Abstract: A display substrate and related devices are provided. The display substrate includes a plurality of first sub-pixels, second sub-pixels and third sub-pixels. In a first direction, the first sub-pixels and the third sub-pixels are arranged alternately to form a plurality of first sub-pixel rows, the second sub-pixels form a plurality of second sub-pixel rows, the first sub-pixel rows and the second sub-pixel rows are arranged alternately in a second direction, connection lines of center points of two first sub-pixels and two third sub-pixels form a first virtual quadrilateral, the two first sub-pixels are located at two vertex angles of the first virtual quadrilateral which are opposite to each other, one second sub-pixel is located within the first virtual quadrilateral, and the first virtual quadrilateral includes two interior angles each being equal to 90° and two interior angles each being not equal to 90°.
    Type: Grant
    Filed: November 30, 2020
    Date of Patent: April 30, 2024
    Assignees: CHENGDU BOE OPTOELECTRONICS TECHNOLOGY CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Qian Xu, Tong Niu, Yan Huang, Guomeng Zhang, Chang Luo, Jianpeng Wu, Peng Xu, Fengli Ji, Yi Zhang, Benlian Wang, Ming Hu
  • Patent number: 11966322
    Abstract: A method, computer program product and system are provided for preloading debug information based on the presence of incremental source code files. Based on parsed input parameters to a source code debugger, a source code repository and a local storage area are searched for an incremental file. In response to the incremental file being located, a preload indicator in the incremental file, which is a source code file, is set. Based on the preload indicator being set, debug symbol data from the incremental file is merged to a preload symbol list. In response to receiving a command to examine the debug symbol data from the incremental file, the preload symbol list is searched for the requested debug symbol data.
    Type: Grant
    Filed: November 25, 2020
    Date of Patent: April 23, 2024
    Assignee: International Business Machines Corporation
    Inventors: Xiao Ling Chen, Xiao Xuan Fu, Jiang Yi Liu, Zhan Peng Huo, Wen Ji Huang, Qing Yu Pei, Min Cheng, Yan Huang
  • Patent number: 11967151
    Abstract: Embodiments of this application disclose a video classification method performed by a computer device and belong to the field of computer vision (CV) technologies. The method includes: obtaining a video; selecting n image frames from the video; extracting respective feature information of the n image frames according to a learned feature fusion policy by using a feature extraction network, the learned feature fusion policy being used for indicating proportions of the feature information of the other image frames that have been fused with feature information of a first image frame in the n image frames; and determining a classification result of the video according to the respective feature information of the n image frames. By replacing complex and repeated 3D convolution operations with simple feature information fusion between adjacent image frames, time for finally obtaining a classification result of the video is therefore reduced, thereby having high efficiency.
    Type: Grant
    Filed: October 29, 2021
    Date of Patent: April 23, 2024
    Assignee: TENCENT TECHNOLOGY (SHENZHEN) COMPANY LIMITED
    Inventors: Yan Li, Xintian Shi, Bin Ji
  • Publication number: 20240124443
    Abstract: The present invention relates to a compound of formula (I) capable of inhibiting plasmin activity and having blood coagulation and hemostasis activity, and a pharmaceutically acceptable salt, hydrate, isomer, prodrug and mixture thereof, wherein R1 to R3 are as defined in the description.
    Type: Application
    Filed: January 28, 2022
    Publication date: April 18, 2024
    Inventors: Anle YANG, Sen JI, Zhi WANG, Hao WANG, Dewei ZHANG, Xiao WANG, Huan SHEN, Jie XIANG, Jialing XIAN, Yan WANG, Xiao HU, Xiaodong ZHANG, Jun TANG
  • Patent number: 11948991
    Abstract: The present disclosure provides semiconductor structure having an electrical contact. The semiconductor structure includes a semiconductor substrate and a doped polysilicon contact. The doped polysilicon contact is disposed over the semiconductor substrate. The doped polysilicon contact includes a dopant material having a dopant concentration equaling or exceeding about 1015 atom/cm3.
    Type: Grant
    Filed: December 9, 2021
    Date of Patent: April 2, 2024
    Assignee: NANYA TECHNOLOGY CORPORATION
    Inventors: Chen-Hao Lien, Cheng-Yan Ji, Chu-Hsiang Hsu
  • Patent number: 11941318
    Abstract: The present application provides an audio and video playing system, a playing method and a playing device. The system comprises: a display device; a directional sound output module configured to output a directional sound signal; a tracking element configured to monitor a target visual area and to monitor the target display area on the display screen; and a processor, connected with the directional sound output module and the tracking element respectively, and configured to acquire a first audio and video data to be output in the target display area, display image information of the first audio and video data in the target display area, and output sound information of the first audio and video data to the directional sound output module such that the directional sound output module output a directional sound signal towards the target visual area.
    Type: Grant
    Filed: April 27, 2021
    Date of Patent: March 26, 2024
    Assignees: Beijing BOE Optoelectronics Technology Co., Ltd., BOE Technology Group Co., Ltd.
    Inventors: Xiaomang Zhang, Xiangjun Peng, Tiankuo Shi, Chenxi Zhao, Shuo Zhang, Yifan Hou, Yan Sun, Li Tian, Jing Liu, Wei Sun, Zhihua Ji, Yanhui Xi
  • Publication number: 20240071280
    Abstract: A display method comprises: acquiring multiple frames of images to be displayed, one frame of two adjacent frames of the images to be displayed being an image in an odd-numbered row, the other frame being an image in an even-numbered row, the resolution of the image in the odd-numbered row being M*(a*N), the resolution of the image in the even-numbered row being M*(a*N) or (M?1)*(a*N), and a being 1 or 2; and causing an odd-numbered display group to display the image in the odd-numbered row, and causing an even-numbered display group to display the image in the even-numbered row, the odd-numbered display group comprising M*(a*N) odd-numbered display units, the even-numbered display group comprising (M?1)*(a*N) even-numbered display units, the odd-numbered display unit in the i-th row comprising a first sub-pixel, a second sub-pixel, and a third sub-pixel in a pixel unit in the i-th row.
    Type: Application
    Filed: July 8, 2022
    Publication date: February 29, 2024
    Inventors: Tiankuo SHI, Xin DUAN, Minglei CHU, Wei SUN, Xiaomang ZHANG, Shuo ZHANG, Zhihua JI, Yan SUN, Xue DONG
  • Patent number: 11917167
    Abstract: The present disclosure provides an image compression method, including steps of: acquiring a human-eye fixation point on an original image, and determining a fixation region and a non-fixation region of the original image according to the human-eye fixation point; and compressing the non-fixation region, and generating a compressed image according to the fixation region and the compressed non-fixation region. The present disclosure also provides an image display method, an image compression apparatus, an image display apparatus, and a computer readable medium.
    Type: Grant
    Filed: May 8, 2021
    Date of Patent: February 27, 2024
    Assignees: BEIJING BOE OPTOELECTRONICS TECHNOLOGY CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Zhihua Ji, Tiankuo Shi, Xiaomang Zhang, Chingwen Kung, Rui Liu, Yifan Hou, Minglei Chu, Yanhui Xi, Yan Sun, Chenxi Zhao, Xiangjun Peng, Shuo Zhang
  • Patent number: 11903180
    Abstract: A method of manufacturing a semiconductor device is provided. The method includes providing a semiconductor substrate having a trench. The method also includes forming a first buffer layer in the trench. The method further includes forming a doped-polysilicon layer on the first buffer layer in the trench. The method also includes performing a thermal treatment on the doped-polysilicon layer.
    Type: Grant
    Filed: March 21, 2022
    Date of Patent: February 13, 2024
    Assignee: NANYA TECHNOLOGY CORPORATION
    Inventors: Cheng-Yan Ji, Wei-Tong Chen
  • Publication number: 20240031036
    Abstract: Provided in the present disclosure are an optical module, a wavelength adaptive coherent optical communication method, and a computer storage medium, the optical module comprising: a local oscillator laser, used for outputting local oscillator light; a receiving module, used for receiving an input light signal and a local oscillator light signal; a mixing module, used for mixing the input light signal and the local oscillator light signal to obtain a beat frequency signal; and a digital signal processing module, at least configured to be used for calculating the beat frequency signal frequency and, by means of a feedback control loop, adjusting the local oscillator light frequency outputted by the local oscillator laser according to the beat frequency signal frequency.
    Type: Application
    Filed: October 5, 2023
    Publication date: January 25, 2024
    Inventors: Xuezhe ZHENG, Zhe XIA, Yan JI
  • Publication number: 20230413533
    Abstract: The present application provides a method of fabricating a semiconductor device. The method includes steps of forming a transistor in a substrate; depositing an insulative layer on the substrate; forming a first trench penetrating through the insulative layer to expose a portion of a first impurity region of the transistor; performing a first cyclic process comprising a first sequence of a first deposition step and a first removal step to deposit a conductive material in the first trench until a height of the conductive material in the first trench exceeds a predetermined height; filling the first trench with the conductive material after the first cyclic process; forming a storage capacitor contacting the first conductive feature; and depositing an isolation layer to cover the insulative layer and the storage capacitor.
    Type: Application
    Filed: June 10, 2022
    Publication date: December 21, 2023
    Inventors: CHENG-YAN JI, CHU-HSIANG HSU, JING HSU
  • Publication number: 20230402313
    Abstract: The present application provides a method of fabricating a conductive feature. The method of fabricating the conductive feature includes steps of depositing an insulative layer on a substrate, forming a trench in the insulative layer, performing a cyclic process comprising a sequence of a deposition step and a removal step to deposit a conductive material in the trench until the deposition step has been performed is equal to a first preset number of times and a number of the times the removal step has been performed is equal to a second preset number of times, and filling the trench with the conductive material after the cyclic process.
    Type: Application
    Filed: June 10, 2022
    Publication date: December 14, 2023
    Inventors: CHENG-YAN JI, CHU-HSIANG HSU, JING HSU
  • Patent number: 11830762
    Abstract: The present disclosure provides a method of manufacturing a semiconductor structure having an electrical contact. The method includes providing a semiconductor substrate; forming a dielectric structure over the semiconductor substrate, the dielectric structure having a trench; filling a polysilicon material in the trench of the dielectric structure; detecting the polysilicon material to determine a region of the polysilicon material having one or more defects formed therein; implanting the polysilicon material with a dopant material into the region; and annealing the polysilicon material to form a doped polysilicon contact.
    Type: Grant
    Filed: December 9, 2021
    Date of Patent: November 28, 2023
    Assignee: NANYA TECHNOLOGY CORPORATION
    Inventors: Chen-Hao Lien, Cheng-Yan Ji, Chu-Hsiang Hsu
  • Publication number: 20230335395
    Abstract: The present disclosure provides a method of manufacturing a semiconductor device. The method includes: depositing a first semiconductor layer on an inner surface of a trench of a substrate; depositing a second semiconductor layer on the first semiconductor layer on the inner surface of the trench of the substrate, in which a dopant concentration of the first semiconductor layer is less than a dopant concentration of the second semiconductor layer; and depositing a third semiconductor layer on the second semiconductor layer to fill the trench of the substrate, in which a dopant concentration of the third semiconductor layer is less than the dopant concentration of the second semiconductor layer.
    Type: Application
    Filed: April 13, 2022
    Publication date: October 19, 2023
    Inventors: Kai Hung LIN, Cheng Yan JI
  • Publication number: 20230301055
    Abstract: A method of manufacturing a semiconductor device is provided. The method includes providing a semiconductor substrate having a trench. The method also includes forming a first buffer layer in the trench. The method further includes forming a doped-polysilicon layer on the first buffer layer in the trench. The method also includes performing a thermal treatment on the doped-polysilicon layer.
    Type: Application
    Filed: March 21, 2022
    Publication date: September 21, 2023
    Inventors: CHENG-YAN JI, WEI-TONG CHEN
  • Publication number: 20230299161
    Abstract: A semiconductor device and a method of manufacturing a semiconductor device are provided. The semiconductor device includes a semiconductor substrate and a word line structure. The semiconductor substrate has an active region. The word line structure is disposed in the active region of the semiconductor substrate. The word line structure includes a first work function layer, a second work function layer, and a buffer structure. The second work function layer is on the first work function layer. The buffer structure is between the first work function layer and the second work function layer.
    Type: Application
    Filed: March 21, 2022
    Publication date: September 21, 2023
    Inventors: CHENG-YAN JI, WEI-TONG CHEN
  • Publication number: 20230187520
    Abstract: The present disclosure provides semiconductor structure having an electrical contact. The semiconductor structure includes a semiconductor substrate and a doped polysilicon contact. The doped polysilicon contact is disposed over the semiconductor substrate. The doped polysilicon contact includes a dopant material having a dopant concentration equaling or exceeding about 1015 atom/cm3.
    Type: Application
    Filed: December 9, 2021
    Publication date: June 15, 2023
    Inventors: Chen-Hao LIEN, Cheng-Yan JI, Chu-Hsiang HSU
  • Publication number: 20230187266
    Abstract: The present disclosure provides a method of manufacturing a semiconductor structure having an electrical contact. The method includes providing a semiconductor substrate; forming a dielectric structure over the semiconductor substrate, the dielectric structure having a trench; filling a polysilicon material in the trench of the dielectric structure; detecting the polysilicon material to determine a region of the polysilicon material having one or more defects formed therein; implanting the polysilicon material with a dopant material into the region; and annealing the polysilicon material to form a doped polysilicon contact.
    Type: Application
    Filed: December 9, 2021
    Publication date: June 15, 2023
    Inventors: CHEN-HAO LIEN, CHENG-YAN JI, CHU-HSIANG HSU
  • Publication number: 20230098632
    Abstract: A direct current contactor includes a case and two groups of contact components disposed in the case. Each group of contact components includes two moving contacts connected to each other and two fixed contacts. The direct current contactor further includes a drive system configured to drive the moving contacts to move in a direction close to or away from the fixed contacts, so that the moving contacts are connected to or disconnected from the fixed contacts. The case has an arc-extinguishing cavity. A first baffle in the arc-extinguishing cavity divides the arc-extinguishing cavity into a first arc-extinguishing chamber and a second arc-extinguishing chamber. The contact components are respectively located in the first arc-extinguishing chamber and the second arc-extinguishing chamber. In other words, the two groups of contact components are integrated into two arc-extinguishing chambers of one arc-extinguishing cavity and perform connection/disconnection drive by using a single drive system.
    Type: Application
    Filed: December 7, 2022
    Publication date: March 30, 2023
    Applicant: Huawei Digital Power Technologies Co., Ltd.
    Inventors: Chunpeng GU, Hongjiang DONG, Yan JI, Guangming HUANG, Taixian CHEN, Fugao ZHAO
  • Patent number: 11272476
    Abstract: Systems, methods, apparatuses, and computer program products for paging of low complexity UE and/or UE in coverage enhancement mode are provided. One method includes producing a machine type communication (MTC) physical downlink control channel (M-PDCCH) configuration by configuring separate M-PDCCH subsets for paging. One of the subsets may be for low complexity user equipment, and another one of the subsets may be for user equipment operating in coverage enhancement mode.
    Type: Grant
    Filed: January 28, 2020
    Date of Patent: March 8, 2022
    Assignee: NOKIA SOLUTIONS AND NETWORKS OY
    Inventors: Yan Ji Zhang, Yuan Tao Zhang, Rapeepat Ratasuk