Patents by Inventor Yan-Kai Wang

Yan-Kai Wang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11776444
    Abstract: A pixel array substrate, including scanning line pads, data line pads, scanning lines, data lines, gate transmission lines, pixels, a data line signal chip, and a scanning line signal chip, is provided. The scanning lines extend along a first direction. The data lines and the gate transmission lines extend along a second direction. The data lines are electrically connected to the data line pads. The scanning lines are electrically connected to the scanning line pads through the gate transmission lines. A ratio of a number of rows of pixels arranged in the first direction to a number of rows of pixels arranged in the second direction is X:Y. Each pixel includes m sub-pixels.
    Type: Grant
    Filed: November 8, 2021
    Date of Patent: October 3, 2023
    Assignee: Au Optronics Corporation
    Inventors: Yang-Chun Lee, Sheng-Yen Cheng, Yueh-Hung Chung, Min-Tse Lee, Kuang-Hsiang Liao, Shiang-Lin Lian, Yan-Kai Wang, Ya-Ling Hsu, Chen-Hsien Liao
  • Patent number: 11320710
    Abstract: A pixel array substrate including a substrate, data lines, gate lines, pixels, and transfer lines is provided. The data lines are disposed on the substrate and arranged in a first direction. The gate lines are disposed on the substrate and arranged in a second direction interlaced with the first direction. The pixels are disposed on the substrate, each of which includes an active device electrically connected to one of the data lines and one of the gate lines and a pixel electrode electrically connected to the active device. The transfer lines are arranged in the first direction and electrically connected to the gate lines, respectively. The pixels include first pixels. In a top view of the pixel array substrate, at least one of the pixel electrodes of the first pixels is partially overlapped with one of the transfer lines. A driving method of a pixel array substrate is also provided.
    Type: Grant
    Filed: October 29, 2020
    Date of Patent: May 3, 2022
    Assignee: Au Optronics Corporation
    Inventors: Min-Tse Lee, Sheng-Yen Cheng, Yueh-Hung Chung, Kuang-Hsiang Liao, Yang-Chun Lee, Yan-Kai Wang, Ya-Ling Hsu, Yi-Ren Chen, Hung-Che Lin, Sheng-Ju Ho, Chien-Huang Liao, Chen-Hsien Liao
  • Publication number: 20220068182
    Abstract: A pixel array substrate, including scanning line pads, data line pads, scanning lines, data lines, gate transmission lines, pixels, a data line signal chip, and a scanning line signal chip, is provided. The scanning lines extend along a first direction. The data lines and the gate transmission lines extend along a second direction. The data lines are electrically connected to the data line pads. The scanning lines are electrically connected to the scanning line pads through the gate transmission lines. A ratio of a number of rows of pixels arranged in the first direction to a number of rows of pixels arranged in the second direction is X:Y. Each pixel includes m sub-pixels.
    Type: Application
    Filed: November 8, 2021
    Publication date: March 3, 2022
    Applicant: Au Optronics Corporation
    Inventors: Yang-Chun Lee, Sheng-Yen Cheng, Yueh-Hung Chung, Min-Tse Lee, Kuang-Hsiang Liao, Shiang-Lin Lian, Yan-Kai Wang, Ya-Ling Hsu, Chen-Hsien Liao
  • Patent number: 11200826
    Abstract: A pixel array substrate, including scanning line pads, data line pads, scanning lines, data lines, gate transmission lines, pixels, a data line signal chip, and a scanning line signal chip, is provided. The scanning lines extend along a first direction. The data lines and the gate transmission lines extend along a second direction. The data lines are electrically connected to the data line pads. The scanning lines are electrically connected to the scanning line pads through the gate transmission lines. A ratio of a number of rows of pixels arranged in the first direction to a number of rows of pixels arranged in the second direction is X:Y. Each pixel includes m sub-pixels.
    Type: Grant
    Filed: August 6, 2020
    Date of Patent: December 14, 2021
    Assignee: Au Optronics Corporation
    Inventors: Yang-Chun Lee, Sheng-Yen Cheng, Yueh-Hung Chung, Min-Tse Lee, Kuang-Hsiang Liao, Shiang-Lin Lian, Yan-Kai Wang, Ya-Ling Hsu, Chen-Hsien Liao
  • Patent number: 11194205
    Abstract: A pixel array substrate including a substrate, data lines, gate lines, pixels, and transfer lines is provided. The data lines are disposed on the substrate and arranged in a first direction. The gate lines are disposed on the substrate and arranged in a second direction interlaced with the first direction. The pixels are disposed on the substrate, each of which includes an active device electrically connected to one of the data lines and one of the gate lines and a pixel electrode electrically connected to the active device. The transfer lines are arranged in the first direction and electrically connected to the gate lines, respectively. The pixels include first pixels. In a top view of the pixel array substrate, at least one of the pixel electrodes of the first pixels is partially overlapped with one of the transfer lines. A driving method of a pixel array substrate is also provided.
    Type: Grant
    Filed: October 29, 2020
    Date of Patent: December 7, 2021
    Assignee: Au Optronics Corporation
    Inventors: Min-Tse Lee, Sheng-Yen Cheng, Yueh-Hung Chung, Kuang-Hsiang Liao, Yang-Chun Lee, Yan-Kai Wang, Ya-Ling Hsu, Yi-Ren Chen, Hung-Che Lin, Sheng-Ju Ho, Chien-Huang Liao, Chen-Hsien Liao
  • Patent number: 11194204
    Abstract: A pixel array substrate including a substrate, pixel structures, and transfer lines is provided. The pixel structures are disposed on the substrate. Each pixel structure includes a data line, a gate line, an active device, and a pixel electrode. The active device is electrically connected to the data line and the gate line. The pixel electrode is electrically connected to the active device. The pixel electrode defines alignment domains. The alignment domains have different alignment directions. The transfer lines are arranged in a first direction. Gate lines of the pixel structures are arranged in a second direction. The first direction and the second direction are interlaced. The transfer lines are electrically connected to the gate lines. The pixel structures include a first pixel structure. The transfer lines include a first transfer line. The first transfer line overlaps a boundary between the alignment domains of the first pixel structure.
    Type: Grant
    Filed: April 9, 2020
    Date of Patent: December 7, 2021
    Assignee: Au Optronics Corporation
    Inventors: Hung-Che Lin, Min-Tse Lee, Yi-Ren Chen, Yueh-Hung Chung, Sheng-Ju Ho, Yan-Kai Wang, Ya-Ling Hsu, Chien-Huang Liao, Chen-Hsien Liao
  • Patent number: 11126051
    Abstract: A pixel array substrate including a substrate, data lines, gate lines, pixels, and transfer lines is provided. The data lines are disposed on the substrate and arranged in a first direction. The gate lines are disposed on the substrate and arranged in a second direction interlaced with the first direction. The pixels are disposed on the substrate, each of which includes an active device electrically connected to one of the data lines and one of the gate lines and a pixel electrode electrically connected to the active device. The transfer lines are arranged in the first direction and electrically connected to the gate lines, respectively. The pixels include first pixels. In a top view of the pixel array substrate, at least one of the pixel electrodes of the first pixels is partially overlapped with one of the transfer lines. A driving method of a pixel array substrate is also provided.
    Type: Grant
    Filed: October 29, 2020
    Date of Patent: September 21, 2021
    Assignee: Au Optronics Corporation
    Inventors: Min-Tse Lee, Sheng-Yen Cheng, Yueh-Hung Chung, Kuang-Hsiang Liao, Yang-Chun Lee, Yan-Kai Wang, Ya-Ling Hsu, Yi-Ren Chen, Hung-Che Lin, Sheng-Ju Ho, Chien-Huang Liao, Chen-Hsien Liao
  • Patent number: 11126050
    Abstract: A pixel array substrate including a substrate, data lines, gate lines, pixels, and transfer lines is provided. The data lines are disposed on the substrate and arranged in a first direction. The gate lines are disposed on the substrate and arranged in a second direction interlaced with the first direction. The pixels are disposed on the substrate, each of which includes an active device electrically connected to one of the data lines and one of the gate lines and a pixel electrode electrically connected to the active device. The transfer lines are arranged in the first direction and electrically connected to the gate lines, respectively. The pixels include first pixels. In a top view of the pixel array substrate, at least one of the pixel electrodes of the first pixels is partially overlapped with one of the transfer lines. A driving method of a pixel array substrate is also provided.
    Type: Grant
    Filed: October 29, 2020
    Date of Patent: September 21, 2021
    Assignee: Au Optronics Corporation
    Inventors: Min-Tse Lee, Sheng-Yen Cheng, Yueh-Hung Chung, Kuang-Hsiang Liao, Yang-Chun Lee, Yan-Kai Wang, Ya-Ling Hsu, Yi-Ren Chen, Hung-Che Lin, Sheng-Ju Ho, Chien-Huang Liao, Chen-Hsien Liao
  • Publication number: 20210116764
    Abstract: A pixel array substrate including a substrate, pixel structures, and transfer lines is provided. The pixel structures are disposed on the substrate. Each pixel structure includes a data line, a gate line, an active device, and a pixel electrode. The active device is electrically connected to the data line and the gate line. The pixel electrode is electrically connected to the active device. The pixel electrode defines alignment domains. The alignment domains have different alignment directions. The transfer lines are arranged in a first direction. Gate lines of the pixel structures are arranged in a second direction. The first direction and the second direction are interlaced. The transfer lines are electrically connected to the gate lines. The pixel structures include a first pixel structure. The transfer lines include a first transfer line. The first transfer line overlaps a boundary between the alignment domains of the first pixel structure.
    Type: Application
    Filed: April 9, 2020
    Publication date: April 22, 2021
    Applicant: Au Optronics Corporation
    Inventors: Hung-Che Lin, Min-Tse Lee, Yi-Ren Chen, Yueh-Hung Chung, Sheng-Ju Ho, Yan-Kai Wang, Ya-Ling Hsu, Chien-Huang Liao, Chen-Hsien Liao
  • Publication number: 20210056882
    Abstract: A pixel array substrate, including scanning line pads, data line pads, scanning lines, data lines, gate transmission lines, pixels, a data line signal chip, and a scanning line signal chip, is provided. The scanning lines extend along a first direction. The data lines and the gate transmission lines extend along a second direction. The data lines are electrically connected to the data line pads. The scanning lines are electrically connected to the scanning line pads through the gate transmission lines. A ratio of a number of rows of pixels arranged in the first direction to a number of rows of pixels arranged in the second direction is X:Y. Each pixel includes m sub-pixels.
    Type: Application
    Filed: August 6, 2020
    Publication date: February 25, 2021
    Applicant: Au Optronics Corporation
    Inventors: Yang-Chun Lee, Sheng-Yen Cheng, Yueh-Hung Chung, Min-Tse Lee, Kuang-Hsiang Liao, Shiang-Lin Lian, Yan-Kai Wang, Ya-Ling Hsu, Chen-Hsien Liao
  • Publication number: 20210041754
    Abstract: A pixel array substrate including a substrate, data lines, gate lines, pixels, and transfer lines is provided. The data lines are disposed on the substrate and arranged in a first direction. The gate lines are disposed on the substrate and arranged in a second direction interlaced with the first direction. The pixels are disposed on the substrate, each of which includes an active device electrically connected to one of the data lines and one of the gate lines and a pixel electrode electrically connected to the active device. The transfer lines are arranged in the first direction and electrically connected to the gate lines, respectively. The pixels include first pixels. In a top view of the pixel array substrate, at least one of the pixel electrodes of the first pixels is partially overlapped with one of the transfer lines. A driving method of a pixel array substrate is also provided.
    Type: Application
    Filed: October 29, 2020
    Publication date: February 11, 2021
    Applicant: Au Optronics Corporation
    Inventors: Min-Tse Lee, Sheng-Yen Cheng, Yueh-Hung Chung, Kuang-Hsiang Liao, Yang-Chun Lee, Yan-Kai Wang, Ya-Ling Hsu, Yi-Ren Chen, Hung-Che Lin, Sheng-Ju Ho, Chien-Huang Liao, Chen-Hsien Liao
  • Publication number: 20210041755
    Abstract: A pixel array substrate including a substrate, data lines, gate lines, pixels, and transfer lines is provided. The data lines are disposed on the substrate and arranged in a first direction. The gate lines are disposed on the substrate and arranged in a second direction interlaced with the first direction. The pixels are disposed on the substrate, each of which includes an active device electrically connected to one of the data lines and one of the gate lines and a pixel electrode electrically connected to the active device. The transfer lines are arranged in the first direction and electrically connected to the gate lines, respectively. The pixels include first pixels. In a top view of the pixel array substrate, at least one of the pixel electrodes of the first pixels is partially overlapped with one of the transfer lines. A driving method of a pixel array substrate is also provided.
    Type: Application
    Filed: October 29, 2020
    Publication date: February 11, 2021
    Applicant: Au Optronics Corporation
    Inventors: Min-Tse Lee, Sheng-Yen Cheng, Yueh-Hung Chung, Kuang-Hsiang Liao, Yang-Chun Lee, Yan-Kai Wang, Ya-Ling Hsu, Yi-Ren Chen, Hung-Che Lin, Sheng-Ju Ho, Chien-Huang Liao, Chen-Hsien Liao
  • Publication number: 20210041756
    Abstract: A pixel array substrate including a substrate, data lines, gate lines, pixels, and transfer lines is provided. The data lines are disposed on the substrate and arranged in a first direction. The gate lines are disposed on the substrate and arranged in a second direction interlaced with the first direction. The pixels are disposed on the substrate, each of which includes an active device electrically connected to one of the data lines and one of the gate lines and a pixel electrode electrically connected to the active device. The transfer lines are arranged in the first direction and electrically connected to the gate lines, respectively. The pixels include first pixels. In a top view of the pixel array substrate, at least one of the pixel electrodes of the first pixels is partially overlapped with one of the transfer lines. A driving method of a pixel array substrate is also provided.
    Type: Application
    Filed: October 29, 2020
    Publication date: February 11, 2021
    Applicant: Au Optronics Corporation
    Inventors: Min-Tse Lee, Sheng-Yen Cheng, Yueh-Hung Chung, Kuang-Hsiang Liao, Yang-Chun Lee, Yan-Kai Wang, Ya-Ling Hsu, Yi-Ren Chen, Hung-Che Lin, Sheng-Ju Ho, Chien-Huang Liao, Chen-Hsien Liao
  • Publication number: 20210041753
    Abstract: A pixel array substrate including a substrate, data lines, gate lines, pixels, and transfer lines is provided. The data lines are disposed on the substrate and arranged in a first direction. The gate lines are disposed on the substrate and arranged in a second direction interlaced with the first direction. The pixels are disposed on the substrate, each of which includes an active device electrically connected to one of the data lines and one of the gate lines and a pixel electrode electrically connected to the active device. The transfer lines are arranged in the first direction and electrically connected to the gate lines, respectively. The pixels include first pixels. In a top view of the pixel array substrate, at least one of the pixel electrodes of the first pixels is partially overlapped with one of the transfer lines. A driving method of a pixel array substrate is also provided.
    Type: Application
    Filed: October 29, 2020
    Publication date: February 11, 2021
    Applicant: Au Optronics Corporation
    Inventors: Min-Tse Lee, Sheng-Yen Cheng, Yueh-Hung Chung, Kuang-Hsiang Liao, Yang-Chun Lee, Yan-Kai Wang, Ya-Ling Hsu, Yi-Ren Chen, Hung-Che Lin, Sheng-Ju Ho, Chien-Huang Liao, Chen-Hsien Liao
  • Patent number: 10852609
    Abstract: A pixel array substrate including a substrate, data lines, gate lines, pixels, and transfer lines is provided. The data lines are disposed on the substrate and arranged in a first direction. The gate lines are disposed on the substrate and arranged in a second direction interlaced with the first direction. The pixels are disposed on the substrate, each of which includes an active device electrically connected to one of the data lines and one of the gate lines and a pixel electrode electrically connected to the active device. The transfer lines are arranged in the first direction and electrically connected to the gate lines, respectively. The pixels include first pixels. In a top view of the pixel array substrate, at least one of the pixel electrodes of the first pixels is partially overlapped with one of the transfer lines. A driving method of a pixel array substrate is also provided.
    Type: Grant
    Filed: February 18, 2020
    Date of Patent: December 1, 2020
    Assignee: Au Optronics Corporation
    Inventors: Min-Tse Lee, Sheng-Yen Cheng, Yueh-Hung Chung, Kuang-Hsiang Liao, Yang-Chun Lee, Yan-Kai Wang, Ya-Ling Hsu, Yi-Ren Chen, Hung-Che Lin, Sheng-Ju Ho, Chien-Huang Liao, Chen-Hsien Liao
  • Publication number: 20200272010
    Abstract: A pixel array substrate including a substrate, data lines, gate lines, pixels, and transfer lines is provided. The data lines are disposed on the substrate and arranged in a first direction. The gate lines are disposed on the substrate and arranged in a second direction interlaced with the first direction. The pixels are disposed on the substrate, each of which includes an active device electrically connected to one of the data lines and one of the gate lines and a pixel electrode electrically connected to the active device. The transfer lines are arranged in the first direction and electrically connected to the gate lines, respectively. The pixels include first pixels. In a top view of the pixel array substrate, at least one of the pixel electrodes of the first pixels is partially overlapped with one of the transfer lines. A driving method of a pixel array substrate is also provided.
    Type: Application
    Filed: February 18, 2020
    Publication date: August 27, 2020
    Applicant: Au Optronics Corporation
    Inventors: Min-Tse Lee, Sheng-Yen Cheng, Yueh-Hung Chung, Kuang-Hsiang Liao, Yang-Chun Lee, Yan-Kai Wang, Ya-Ling Hsu, Yi-Ren Chen, Hung-Che Lin, Sheng-Ju Ho, Chien-Huang Liao, Chen-Hsien Liao