Patents by Inventor Yan-Man Tsui

Yan-Man Tsui has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6927094
    Abstract: The present invention provides a semiconductor device packaging assembly and method for manufacturing the assembly. Preferably, the method of the present invention is used to assemble a plurality of semiconductor chips, such that the throughput of assembly can be enhanced. The method comprises the steps of: providing a bottom frame matrix including a plurality of bottom frame units, each of which unit comprises a bottom supporting portion and a bottom frame portion; providing a bridge frame including a plurality of bridge frame units, each of which unit comprises a bridge frame portion and a plurality of conducting bars; placing each of the semiconductor chips on each of the bottom supporting portions, respectively; and bonding each bottom frame unit and each bridge frame unit together, wherein, the conducting bars extending from each bridge frame portion toward corresponding chips are electrically coupled to bonding areas of the corresponding chips.
    Type: Grant
    Filed: May 30, 2003
    Date of Patent: August 9, 2005
    Assignee: General Semiconductor of Taiwan, Ltd.
    Inventors: Max Chen, Ching Lu Hsu, Kuang Hann Lin, Yan-Man Tsui
  • Publication number: 20030205792
    Abstract: The present invention provides a semiconductor device packaging assembly and method for manufacturing the assembly. Preferably, the method of the present invention is used to assemble a plurality of semiconductor chips, such that the throughput of assembly can be enhanced. The method comprises the steps of: providing a bottom frame matrix including a plurality of bottom frame units, each of which unit comprises a bottom supporting portion and a bottom frame portion; providing a bridge frame including a plurality of bridge frame units, each of which unit comprises a bridge frame portion and a plurality of conducting bars; placing each of the semiconductor chips on each of the bottom supporting portions, respectively, and bonding each bottom frame unit and each bridge frame unit together, wherein, the conducting bars extending from each bridge frame portion toward corresponding chips are electrically coupled to bonding areas of the corresponding chips.
    Type: Application
    Filed: May 30, 2003
    Publication date: November 6, 2003
    Inventors: Max Chen, C. L. Hsu, K. H. Lin, Yan-Man Tsui
  • Patent number: 6576985
    Abstract: The present invention provides a semiconductor device packaging assembly and method for manufacturing the assembly. Preferably, the method of the present invention is used to assemble a plurality of semiconductor chips, such that the throughput of assembly can be enhanced, by providing a bottom frame matrix including a plurality of bottom frame units, each of which unit includes a bottom supporting portion and a bottom frame portion; providing a bridge frame including a plurality of bridge frame units, each of which unit includes a bridge frame portion and a plurality of conducting bars; placing each of the semiconductor chips on each of the bottom supporting portions, respectively; and bonding each bottom frame unit and each bridge frame unit together, wherein, the conducting bars extending from each bridge frame portion toward corresponding chips are electrically coupled to bonding areas of the corresponding chips.
    Type: Grant
    Filed: January 18, 2001
    Date of Patent: June 10, 2003
    Assignee: General Semiconductor Taiwan, Ltd.
    Inventors: Max Chen, Ching Lu Hsu, Kuang Hann Lin, Yan-Man Tsui
  • Publication number: 20020000647
    Abstract: The present invention provides a semiconductor device packaging assembly and method for manufacturing the assembly. Preferably, the method of the present invention is used to assemble a plurality of semiconductor chips, such that the throughput of assembly can be enhanced. The method comprises the steps of: providing a bottom frame matrix including a plurality of bottom frame units, each of which unit comprises a bottom supporting portion and a bottom frame portion; providing a bridge frame including a plurality of bridge frame units, each of which unit comprises a bridge frame portion and a plurality of conducting bars; placing each of the semiconductor chips on each of the bottom supporting portions, respectively; and bonding each bottom frame unit and each bridge frame unit together, wherein, the conducting bars extending from each bridge frame portion toward corresponding chips are electrically coupled to bonding areas of the corresponding chips.
    Type: Application
    Filed: January 18, 2001
    Publication date: January 3, 2002
    Inventors: Max Chen, C. L. Hsu, K. H. Lin, Yan-Man Tsui