Abstract: A dummy gate structure may be formed for a semiconductor device. The dummy gate structure may be formed from an amorphous polysilicon layer. The amorphous polysilicon layer may be deposited in a blanket deposition operation. An annealing operation is performed for the semiconductor device to remove voids, seams, and/or other defects from the amorphous polysilicon layer. The annealing operation may cause the amorphous polysilicon layer to crystallize, thereby resulting in the amorphous polysilicon layer transitioning into a crystallized polysilicon layer. A dual radio frequency (RF) source etch technique may be performed to increase the directionality of ions and radicals in a plasma that is used to etch the crystallized polysilicon layer to form the dummy gate structure. The increased directionality of the ions increases the effectiveness of the ions in etching through the different crystal grain boundaries which increases the etch rate uniformity across the crystallized polysilicon layer.

Abstract: A wafer supporting mechanism and a method for wafer dicing are provided. The wafer supporting mechanism includes a base portion and a support portion. The base portion includes a first gas channel and a first outlet connected to the first gas channel. The support portion is connected to the base portion and including a second gas channel connected to the first gas channel. An accommodation space is defined by the base portion and the support portion.

Abstract: A wafer supporting mechanism and a method for wafer dicing are provided. The wafer supporting mechanism includes a base portion and a support portion. The base portion includes a first gas channel and a first outlet connected to the first gas channel. The support portion is connected to the base portion and including a second gas channel connected to the first gas channel. An accommodation space is defined by the base portion and the support portion.

Abstract: A method of manufacturing a semiconductor structure is provided. The method includes the following operations: providing a semiconductor substrate; performing a first cutting operation along a first set of cutting lines of the semiconductor substrate; and performing a second cutting operation along a second set of cutting lines of the semiconductor substrate later than performing the first cutting operation, wherein the second set of cutting lines are arranged interlacedly with the first set of cutting lines along a first direction.

Abstract: A semiconductor device includes a fin structure protruding from an isolation insulating layer disposed over a substrate and having a channel region, a source/drain region disposed over the substrate, a gate dielectric layer disposed on the channel region, and a gate electrode layer disposed on the gate dielectric layer. The gate electrode includes a lower portion below a level of a top of the channel region and above an upper surface of the isolation insulating layer, and a width of the lower portion is not constant.

Abstract: A semiconductor device includes a fin structure protruding from an isolation insulating layer disposed over a substrate and having a channel region, a source/drain region disposed over the substrate, a gate dielectric layer disposed on the channel region, and a gate electrode layer disposed on the gate dielectric layer. The gate electrode includes a lower portion below a level of a top of the channel region and above an upper surface of the isolation insulating layer, and a width of the lower portion is not constant.

Abstract: A wafer supporting mechanism and a method for wafer dicing are provided. The wafer supporting mechanism includes a base portion and a support portion. The base portion includes a first gas channel and a first outlet connected to the first gas channel. The support portion is connected to the base portion and including a second gas channel connected to the first gas channel. An accommodation space is defined by the base portion and the support portion.

Abstract: A semiconductor device includes a fin structure protruding from an isolation insulating layer disposed over a substrate and having a channel region, a source/drain region disposed over the substrate, a gate dielectric layer disposed on the channel region, and a gate electrode layer disposed on the gate dielectric layer. The gate electrode includes a lower portion below a level of a top of the channel region and above an upper surface of the isolation insulating layer, and a width of the lower portion is not constant.

Abstract: A method of processing a semiconductor wafer is provided. The method includes providing a semiconductor wafer having a front side and a back side, the semiconductor wafer provided with a circuit layer at the front side and a patterned surface at the back side, forming a sacrificial layer on the back side, mounting a tape on the sacrificial layer, the sacrificial layer isolating the patterned surface from the tape, wherein adhesion strength between the sacrificial layer and the patterned surface is larger than that between the sacrificial layer and the tape, dicing the semiconductor wafer at the back side through the tape, defining individual chips on the semiconductor wafer, and expanding the tape to separate the chips from each other.

Abstract: A method of processing a semiconductor wafer is provided. The method includes providing a semiconductor wafer having a front side and a back side, the semiconductor wafer provided with a circuit layer at the front side and a patterned surface at the back side, forming a sacrificial layer on the back side, mounting a tape on the sacrificial layer, the sacrificial layer isolating the patterned surface from the tape, wherein adhesion strength between the sacrificial layer and the patterned surface is larger than that between the sacrificial layer and the tape, dicing the semiconductor wafer at the back side through the tape, defining individual chips on the semiconductor wafer, and expanding the tape to separate the chips from each other.

Abstract: A method for producing a bio-based polymeric shoe component includes: preparing a blend from a composition including 5˜50 weight parts of a modified starch, 50˜95 weight parts of an ethylene vinyl acetate copolymer, 5˜30 weight parts of a filler, 1˜50 weight parts of a polyolefin, 2.0˜8.0 weight parts of a foaming agent, 0.5˜3.0 weight parts of a foaming aid, 0.5˜2.0 weight parts of a lubricant, and 0.4˜1.2 weight parts of a crosslinking agent, the modified starch being obtained by hydrolyzing and esterifying a predetermined amount of a raw starch to form a hydrolyzed and esterified starch, followed by drying the hydrolyzed and esterified starch; processing the blend into a foamable product; and forming the foamable product into the shoe component.

Abstract: A method for producing a bio-based polymeric shoe component includes: preparing a blend from a composition including 5˜50 weight parts of a modified starch, 50˜95 weight parts of an ethylene vinyl acetate copolymer, 5˜30 weight parts of a filler, 1˜50 weight parts of a polyolefin, 2.0˜8.0 weight parts of a foaming agent, 0.5˜3.0 weight parts of a foaming aid, 0.5˜2.0 weight parts of a lubricant, and 0.4˜1.2 weight parts of a crosslinking agent, the modified starch being obtained by hydrolyzing and esterifying a predetermined amount of a raw starch to form a hydrolyzed and esterified starch, followed by drying the hydrolyzed and esterified starch; processing the blend into a foamable product; and forming the foamable product into the shoe component.