Abstract: A method for compensating a threshold voltage drift of a thin film transistor comprises: controlling a drain and a gate of the thin film transistor to have a same voltage; and keeping the voltage at the gate of the thin film transistor unchanged and controlling the voltage at the drain of the thin film transistor to be equal to a voltage at a source of the thin film transistor.

Abstract: Embodiments of the invention provide an array substrate, a display device and a manufacturing method of the array substrate. The array substrate comprises a substrate (10) and a plurality of electrostatic discharge short-circuit rings (20) provided on the substrate. Each of the electrostatic discharge short-circuit rings (20) comprises a gate electrode (22), a gate insulating layer (26), an active layer (21), a source electrode (23), a drain electrode (24) and a passivation layer (30). Each of the electrostatic discharge short-circuit ring (20) further comprises a transparent conductive layer (25) for connecting the gate electrode (22) and the drain electrode (24), and the transparent conductive layer (25) is provided below the passivation layer (30).

Abstract: An array substrate, a manufacturing method thereof and a display device are provided. As for the method of manufacturing the array substrate, the common electrode and the pixel electrode are formed by a single process simultaneously. Therefore, the problems of process complexity and the higher costs in the existing manufacturing process of array substrate can be solved.

Abstract: Defect management systems and methods are disclosed. A system for managing defects on an object includes an automatic defect classification (ADC) module, a lithographic plane review (LPR) module, and a defect progression monitor (DPM) module in communication with the ADC module and the LPR module. The DPM module is adapted to obtain information regarding a defect disposed on the object from the ADC module and the LPR module and determine if a repair or cleaning is needed of the object.

Abstract: A manufacturing method of the light guide plates, a light guide plate made by the method and a double-side display device comprising the light guide plate. The manufacturing method of a light guide plate comprises: forming a plurality of alternating first grooves (101) and second grooves (102) on a surface of a transparent substrate (100); forming a first reflective layer (300) on a surface of the first groove (101); and forming a transparent protective layer (500) on the entire surface of the substrate. According to the present disclosure, a light guide plate is provided that can be used in the double-side display device.

Abstract: An embodiment of the present invention discloses a method for detecting crosstalk of a liquid crystal display panel, involving detection on a liquid crystal display panel for defect of special crosstalk of the liquid crystal display panel. The method comprises: inputting signals into the liquid crystal display panel to be detected so that a detection pattern is displayed on the liquid crystal display panel to be detected; a gray-scale value for all the pixels in an intermediate region is 0; in other regions a gray-scale value for all the pixels in first pixel groups is the same, a color and gray-scale value for all the pixels in second pixel groups are the same, and the gray-scale value for all the pixels in the second pixel groups differs from that for all the pixels in the first pixel groups; the first pixel groups and the second pixel groups are same in shape, and both are distributed alternatively in both transverse and longitudinal directions in the other regions.

Abstract: A method for on-line diagnosing gradually-changing fault of electronic current transformers comprises the following steps collecting output signals of electronic transformers of a whole transformer substation, calculating theoretical instantaneous values of the current at the tail ends of power transmission lines and on secondary sides of transformers at every moment, comparing the theoretical instantaneous values with the corresponding collected values, calculating residual errors of the electronic current transformers at the head and tail ends of each power transmission line and the primary and the secondary sides of each transformer respectively, judging whether gradually-changing fault occurs with the electronic current transformers by comparing the residual errors with preset threshold values, and simultaneously performing Kirchhoff detection by injecting current into a busbar to position a fault transformer.

Abstract: An Email processing method and system comprising in response to obtaining an Email, parsing contents of the Email to obtain an Email subject identifier of the Email, at least one new interaction record, and interaction information corresponding to the at least one new interaction record; determining whether there is a merged Email, which has a merge Email subject identifier matching a subject identifier of the Email, and conforms to a predefined interaction content structure comprising at least one interaction record divided by interaction relationship of contents; and in response to that the determination result is yes, merging the at least one new interaction record of the Email into the merged Email to generate a new merged Email based on the interaction information corresponding to the at least one new interaction record.

Abstract: A method is provided for fabricating a pixel structure of a CMOS transistor. The method includes providing a semiconductor substrate doped with first type doping ions; and forming a trench in the semiconductor substrate by etching the semiconductor substrate. The method also includes forming isolation layers on side surfaces of the trench to prevent dark current from laterally transferring; and forming an epitaxial layer doped with second type doping ions with a doping type opposite to a doping type of the first type doping ions in the trench. Further, the method includes forming a pinning layer on a top surface of the epitaxial layer; and forming a gate structure on a surface of the semiconductor substrate at one side of the epitaxial layer. Further, the method also includes forming a floating diffusion region in the semiconductor substrate at one side of the gate structure far from the epitaxial layer.

Abstract: A method is provided for fabricating a pixel structure of a CMOS transistor. The method includes providing a semiconductor substrate doped with first type doping ions; and forming a trench in the semiconductor substrate by etching the semiconductor substrate. The method also includes forming isolation layers on side surfaces of the trench to prevent dark current from laterally transferring; and forming an epitaxial layer doped with second type doping ions with a doping type opposite to a doping type of the first type doping ions in the trench. Further, the method includes forming a pinning layer on a top surface of the epitaxial layer; and forming a gate structure on a surface of the semiconductor substrate at one side of the epitaxial layer. Further, the method also includes forming a floating diffusion region in the semiconductor substrate at one side of the gate structure far from the epitaxial layer.

Abstract: A substrate provided with alignment marks, a display screen, a splicing screen and an alignment method of splicing screen, in which, the splicing screen includes at least two display screens with alignment marks. A substrate of the display screen is provided with at least two alignment marks, and different alignment marks have a height difference therebetween which is larger or equal to a standard difference value. A narrow bezel splicing of display screens can be achieved by setting the alignment marks with different heights.

Abstract: Embodiments of the invention provide an infrared touch module, an infrared touch screen panel and a display device. An infrared emitting unit is provided on two adjacent side walls of a circuit board outer frame, and an infrared receiving unit is provided on the other two adjacent side walls of the circuit board outer frame. The infrared emitting unit comprises a plurality of infrared emitters located in the same horizontal plane, and the infrared receiving unit comprises first infrared receivers for receiving infrared light rays in a horizontal direction emitted from respective infrared emitters. The infrared emitting unit further comprises a reflector located above or below each infrared emitter, for reflecting an infrared light that is emitted from each infrared emitter to the reflector along the horizontal direction; and the infrared receiving unit further comprises second infrared receivers for receiving infrared light rays in the horizontal direction reflected by the reflector.

Abstract: A method for compensating a threshold voltage drift of a thin film transistor comprises: controlling a drain and a gate of the thin film transistor to have a same voltage; and keeping the voltage at the gate of the thin film transistor unchanged and controlling the voltage at the drain of the thin film transistor to be equal to a voltage at a source of the thin film transistor.

Abstract: A method is provided for fabricating a pixel structure of a CMOS transistor. The method includes providing a semiconductor substrate doped with first type doping ions; and forming a trench in the semiconductor substrate by etching the semiconductor substrate. The method also includes forming isolation layers on side surfaces of the trench to prevent dark current from laterally transferring; and forming an epitaxial layer doped with second type doping ions with a doping type opposite to a doping type of the first type doping ions in the trench. Further, the method includes forming a pinning layer on a top surface of the epitaxial layer; and forming a gate structure on a surface of the semiconductor substrate at one side of the epitaxial layer. Further, the method also includes forming a floating diffusion region in the semiconductor substrate at one side of the gate structure far from the epitaxial layer.

Abstract: A method of manufacturing a light guiding plate comprises steps of forming a protrusion array composed of a plurality of protrusions (300) on a surface of a substrate (100); and forming reflective layers (301) on side facets of the protrusions (300) respectively, in such a way that, the farther away from a side of the substrate (100) the protrusion (300) with the reflective layer is, the greater the reflectivity of the reflective layer (301) is. The light emitted from the light guiding plate made by the method is relatively uniform, and the heating issue is also avoided.

Abstract: The present invention provides a stereoscopic display device, comprising: a display panel and a lens grating, wherein further comprising: a waveform lens disposed between said display panel and said lens grating; the wave crest of said waveform lens corresponds to the black matrix area of said display panel, the wave trough of said waveform lens corresponds to the pixel area of said display panel. In the solution of the present invention, by employing the waveform lens disposed in front of the display panel, the crosstalk between images can be decreased and the stereoscopic image display effect can be improved while the luminance of the display panel does not become darken.

Abstract: An output thin film transistor threshold voltage offset compensation circuit, a GOA circuit, and a display. The circuit includes: a first capacitor, comprising a first electrode and a second electrode, the first electrode being connected to the gate of an output thin film transistor and receiving a charge signal, the second electrode being connected to the drain of the output thin film transistor, the first capacitor being used for, under the action of the charge signal, making the first electrode and the second electrode have a same voltage, so that a voltage difference between the drain and the source of the output thin film transistor is equal to a threshold voltage thereof; a first switch unit, connected to the drain and the source of the output thin film transistor, and opening under the action of a first clock signal, so that a voltage difference between the gate and the source of the output thin film transistor is equal to the threshold voltage thereof.

Abstract: A method is provided for fabricating a pixel structure of a CMOS transistor. The method includes providing a semiconductor substrate doped with first type doping ions; and forming a trench in the semiconductor substrate by etching the semiconductor substrate. The method also includes forming isolation layers on side surfaces of the trench to prevent dark current from laterally transferring; and forming an epitaxial layer doped with second type doping ions with a doping type opposite to a doping type of the first type doping ions in the trench. Further, the method includes forming a pinning layer on a top surface of the epitaxial layer; and forming a gate structure on a surface of the semiconductor substrate at one side of the epitaxial layer. Further, the method also includes forming a floating diffusion region in the semiconductor substrate at one side of the gate structure far from the epitaxial layer.

Abstract: A headrest assembly for a chair includes a headrest unit, two spaced-apart grip frame members respectively connected to two opposite ends of the headrest unit, and two spaced-apart connection frame members respectively connected to the grip frame members. The grip frame members gradually extend away from each other from the headrest unit to the connection frame members, respectively. Each of the grip frame members extends obliquely, rearwardly and downwardly from the headrest unit in a manner of being oblique to a first vertical plane that has opposite front and rear surfaces respectively facing front and rear sides of the chair.

Abstract: The present disclosure provides a method including providing a first image and a second image. The first image is of a substrate having a defect and the second image is of a reference substrate. A difference between the first image and the second image is determined. A simulation model is used to generate a simulation curve corresponding to the difference and the substrate dispositioned based on the simulation curve. In another embodiment, the scan of a substrate is used to generate a statistical process control chart.