Patents by Inventor Yan Yi

Yan Yi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20260128584
    Abstract: According to some embodiments, a device includes a reference supply pad, a negative supply pad, a resistor connected to the negative supply pad, and a first transistor connected to the reference supply pad and the negative supply pad and having a first gate electrode connected to the resistor, wherein responsive to an electrostatic voltage being applied to one of the reference supply pad or the negative supply pad, the first transistor is operable to shunt current to the negative supply pad.
    Type: Application
    Filed: November 5, 2024
    Publication date: May 7, 2026
    Applicant: Infineon Technologies LLC
    Inventors: Yan Yi, Mimi QIAN
  • Patent number: 12505547
    Abstract: A method and apparatus for identifying a vulnerable coronary plaque based on a multimodal large language model (MM-LLM) are provided. The method includes: acquiring a target 3D coronary computed tomography angiography (CCTA) image and a target straightened curved planar reformation (SCPR) image; acquiring plaque mask information of a blood vessel based on the target SCPR image; acquiring basic plaque data based on the plaque mask information; acquiring fluid dynamics data of each plaque area based on the SCPR image; acquiring basic clinical testing information; standardizing above image data, structural data, and textual data separately, and performing, by a regression mapping network, feature fusion to acquire a first fusion feature; acquiring a trained vulnerable plaque identification LLM; and inputting the first fusion feature into the vulnerable plaque identification LLM to acquire an identification result.
    Type: Grant
    Filed: January 15, 2025
    Date of Patent: December 23, 2025
    Assignees: PEKING UNION MEDICAL COLLEGE HOSPITAL, BEIJING UNITED IMAGING RESEARCH INSTITUTE OF INTELLIGENT IMAGING
    Inventors: Yining Wang, Yan Yi, Yue Sun, Keting Xu, Zhen Qian, Shuaikun Wang
  • Publication number: 20250130866
    Abstract: The present disclosure relates to a method for processing a task, an electronic device and a storage medium. The method includes: obtaining an available resource for a to-be-processed task, and the to-be-processed task is a task of a device; and processing the to-be-processed task by using the available resource, in response to the to-be-processed task, the device is capable of connecting to at least one other device, and the available resource is provided by the device and/or the at least one other device.
    Type: Application
    Filed: July 5, 2024
    Publication date: April 24, 2025
    Applicant: Beijing Xiaomi Mobile Software Co., Ltd.
    Inventors: Guosheng LI, Yan YI, Bin WANG, Minghua ZHANG
  • Patent number: 11876090
    Abstract: An electrostatic discharge protection circuit capable of clamping both positive and negative ESD events and passing signals is provided. Generally, the circuit includes a p-channel field-effect transistor (PFET) clamp coupled to a pin to be protected, the PFET clamp including a plurality of PFETs in a DN-well, an n-channel field-effect transistors (NFET) clamp coupled between ground and the pin through the PFET clamp, the NFET clamp including a plurality of NFETs coupled in series, and a bias network for biasing a voltage of the DN well to substantially equal a voltage on the pin when the voltage on the pin is greater than ground potential, and to ground potential when the pin voltage is less than ground potential. The plurality of are PFETs coupled in parallel between the pin and the NFET clamp, each of the PFETs is coupled to the pin though one of a plurality ballast resistors.
    Type: Grant
    Filed: November 17, 2022
    Date of Patent: January 16, 2024
    Assignee: Cypress Semiconductor Corporation
    Inventors: David Michael Rogers, Eric N. Mann, Eric Lee Swindlehurst, Toru Miyamae, Timothy John Williams, Ryuta Nagai, Sungkwon Lee, Ravindra M. Kapre, Mimi Xuefeng Zhao Qian, Yan Yi, Dung Si Ho, Boo Chin-Hua
  • Patent number: 11856312
    Abstract: An image processing method can include: acquiring a plurality of image frames obtained by photographing for a subject and a plurality of photographing state parameters respectively adopted when photographing the plurality of image frames, the subject being located at a same position of each image frame; determining a zoom ratio corresponding to the plurality of photographing state parameters respectively according to a preset corresponding relationship between the photographing state parameters and the zoom ratio; zooming corresponding image frames according to the determined zoom ratio to obtain a plurality of target image frames, and encoding the obtained plurality of target image frames into a video file.
    Type: Grant
    Filed: November 5, 2021
    Date of Patent: December 26, 2023
    Assignee: BEIJING XIAOMI MOBILE SOFTWARE CO., LTD.
    Inventors: Jing Xu, Lei Miao, Yan Yi
  • Publication number: 20230343779
    Abstract: An electrostatic discharge protection circuit capable of clamping both positive and negative ESD events and passing signals is provided. Generally, the circuit includes a p-channel field-effect transistor (PFET) clamp coupled to a pin to be protected, the PFET clamp including a plurality of PFETs in a DN-well, an n-channel field-effect transistors (NFET) clamp coupled between ground and the pin through the PFET clamp, the NFET clamp including a plurality of NFETs coupled in series, and a bias network for biasing a voltage of the DN well to substantially equal a voltage on the pin when the voltage on the pin is greater than ground potential, and to ground potential when the pin voltage is less than ground potential. The plurality of are PFETs coupled in parallel between the pin and the NFET clamp, each of the PFETs is coupled to the pin though one of a plurality ballast resistors.
    Type: Application
    Filed: November 17, 2022
    Publication date: October 26, 2023
    Applicant: Cypress Semiconductor Corporation
    Inventors: David Michael Rogers, Eric N. Mann, Eric Lee Swindlehurst, Toru Miyamae, Timothy John Williams, Ryuta Nagai, Sungkwon Lee, Ravindra M. Kapre, Mimi Xuefeng Zhao Qian, Yan Yi, Dung Si Ho, Boo Chin-Hua
  • Patent number: 11581729
    Abstract: A system and method for combining positive and negative voltage electrostatic discharge (ESD) protection into a clamp that uses cascoded circuitry, including detecting, by an electrostatic discharge protection system, a voltage pulse on an input pin of an integrated circuit (IC) controller, the IC controller coupled between a power supply node and a ground supply node; determining, by the ESD protection circuit, an ESD event on the input pin based on the voltage detected on the input pin; and/or controlling, by the ESD protection circuit during the ESD event, one or more clamps to transport the voltage pulse from the input pin of the IC controller to the power supply node.
    Type: Grant
    Filed: April 29, 2021
    Date of Patent: February 14, 2023
    Assignee: Cypress Semiconductor Corporation
    Inventors: David Michael Rogers, Henry H. Yuan, Mimi Qian, Myeongseok Lee, Sungkwon Lee, Yan Yi, Ravindra M. Kapre, Murtuza Lilamwala
  • Patent number: 11521962
    Abstract: An electrostatic discharge protection circuit capable of clamping both positive and negative ESD events and passing signals is provided. Generally, the circuit includes a p-channel field-effect transistor (PFET) clamp coupled to a pin to be protected, the PFET clamp including a plurality of PFETs in a DN-well, an n-channel field-effect transistors (NFET) clamp coupled between ground and the pin through the PFET clamp, the NFET clamp including a plurality of NFETs coupled in series, and a bias network for biasing a voltage of the DN well to substantially equal a voltage on the pin when the voltage on the pin is greater than ground potential, and to ground potential when the pin voltage is less than ground potential. The plurality of are PFETs coupled in parallel between the pin and the NFET clamp, each of the PFETs is coupled to the pin though one of a plurality ballast resistors.
    Type: Grant
    Filed: September 14, 2021
    Date of Patent: December 6, 2022
    Assignee: Cypress Semiconductor Corporation
    Inventors: David Michael Rogers, Eric N. Mann, Eric Lee Swindlehurst, Toru Miyamae, Timothy John Williams, Ryuta Nagai, Sungkwon Lee, Ravindra M. Kapre, Mimi Xuefeng Zhao Qian, Yan Yi, Dung Si Ho, Boo Chin-Hua
  • Publication number: 20220239846
    Abstract: An image processing method can include: acquiring a plurality of image frames obtained by photographing for a subject and a plurality of photographing state parameters respectively adopted when photographing the plurality of image frames, the subject being located at a same position of each image frame; determining a zoom ratio corresponding to the plurality of photographing state parameters respectively according to a preset corresponding relationship between the photographing state parameters and the zoom ratio; zooming corresponding image frames according to the determined zoom ratio to obtain a plurality of target image frames, and encoding the obtained plurality of target image frames into a video file.
    Type: Application
    Filed: November 5, 2021
    Publication date: July 28, 2022
    Inventors: Jing XU, Lei MIAO, Yan YI
  • Publication number: 20220185712
    Abstract: A method for reusing farmland drainage is provided. A device used in the method includes a purifying pond, a filtering mechanism, a water pump and a drainage pipe. The method includes steps: (a) siting a wide and suitable place close to farmland to construct the purifying pond according to landform characteristics of the farmland, and performing an anti-seepage treatment on the purifying pond, and connecting the purifying pond with anti-seepage channels of the farmland; (b) adding flocculants into water through the filtering mechanism to remove particulate organic substances, suspended substances, colloid and phosphate pollutants thereof; and (c) pumping and discharging the purified water to an upstream of each of the anti-seepage channels through the water pump and the drainage pipe to refuse the water. The filtering mechanism arranged on a water inlet pipe of the purifying pond can filter impurities in farmland drainage to avoid water pollution.
    Type: Application
    Filed: November 15, 2021
    Publication date: June 16, 2022
    Inventors: Yingying Xu, Xu Yang, Yan Yi, Yingbo Dou
  • Patent number: 11352282
    Abstract: A method for reusing farmland drainage is provided. A device used in the method includes a purifying pond, a filtering mechanism, a water pump and a drainage pipe. The method includes steps: (a) siting a wide and suitable place close to farmland to construct the purifying pond according to landform characteristics of the farmland, and performing an anti-seepage treatment on the purifying pond, and connecting the purifying pond with anti-seepage channels of the farmland; (b) adding flocculants into water through the filtering mechanism to remove particulate organic substances, suspended substances, colloid and phosphate pollutants thereof; and (c) pumping and discharging the purified water to an upstream of each of the anti-seepage channels through the water pump and the drainage pipe to refuse the water. The filtering mechanism arranged on a water inlet pipe of the purifying pond can filter impurities in farmland drainage to avoid water pollution.
    Type: Grant
    Filed: November 15, 2021
    Date of Patent: June 7, 2022
    Assignee: JILIN JIANZHU UNIVERSITY
    Inventors: Yingying Xu, Xu Yang, Yan Yi, Yingbo Dou
  • Publication number: 20210344193
    Abstract: A system and method for combining positive and negative voltage electrostatic discharge (ESD) protection into a clamp that uses cascoded circuitry, including detecting, by an electrostatic discharge protection system, a voltage pulse on an input pin of an integrated circuit (IC) controller, the IC controller coupled between a power supply node and a ground supply node; determining, by the ESD protection circuit, an ESD event on the input pin based on the voltage detected on the input pin; and/or controlling, by the ESD protection circuit during the ESD event, one or more clamps to transport the voltage pulse from the input pin of the IC controller to the power supply node.
    Type: Application
    Filed: April 29, 2021
    Publication date: November 4, 2021
    Applicant: Cypress Semiconductor Corporation
    Inventors: David Michael Rogers, Henry Yuan, Mimi Qian, Myeongseok Lee, Sungkwon Lee, Yan Yi, Ravindra M. Kapre, Murtuza Lilamwala
  • Patent number: 10872583
    Abstract: A method includes detecting an input operation performed on a display screen of a terminal when the display screen is touched and when a color temperature adjustment region is displayed on the display screen, converting, in response to the input operation, coordinates of an operation point corresponding to the input operation into a first color parameter, obtaining ambient light converting a color parameter of the ambient light into a second color parameter, integrating the first color parameter and the second color parameter to obtain a third color parameter, converting the third color parameter into a target color parameter, and displaying the target color parameter on the display screen of the terminal.
    Type: Grant
    Filed: October 31, 2016
    Date of Patent: December 22, 2020
    Assignee: HUAWEI TECHNOLOGIES CO., LTD.
    Inventors: Shitong Wang, Kuitao Zhu, Hao Wu, Yonglang Wang, Miaofeng Wang, Yan Yi
  • Publication number: 20190362688
    Abstract: A method includes detecting an input operation performed on a display screen of a terminal when the display screen is touched and when a color temperature adjustment region is displayed on the display screen, converting, in response to the input operation, coordinates of an operation point corresponding to the input operation into a first color parameter, obtaining ambient light converting a color parameter of the ambient light into a second color parameter, integrating the first color parameter and the second color parameter to obtain a third color parameter, converting the third color parameter into a target color parameter, and displaying the target color parameter on the display screen of the terminal.
    Type: Application
    Filed: October 31, 2016
    Publication date: November 28, 2019
    Inventors: Shitong Wang, Kuitao Zhu, Hao Wu, Yonglang Wang, Miaofeng Wang, Yan Yi