Patents by Inventor Yan-Yi Liao
Yan-Yi Liao has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240080024Abstract: A driving method for a multiple frequency coupling generator is provided. The method includes: in normal operations, interpreting an input digital control signal transmitted from a digital signal processor into an interpreted digital control signal; interpreting the interpreted digital control signal into a plurality of magnetic coupling signals by a magnetic coupling switch circuit; performing signal recovery and differential delay on the magnetic coupling signals by an interlocking circuit for reducing time difference and signal loss of the magnetic coupling signals; and when the interlocking circuit determines that the magnetic coupling signals have substantially no time difference and no signal loss, transforming the magnetic coupling signals into a first driving signal and a second driving signal by a switch circuit, a driver circuit and an output pad group to drive a backend driving loop.Type: ApplicationFiled: March 30, 2023Publication date: March 7, 2024Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTEInventors: Chih-Chung CHIU, Hung-Yi TENG, Chi-Chung LIAO, Shou-Chung HSIEH, Ke-Horng CHEN, Yan-Fu JHOU
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Patent number: 9397081Abstract: A semiconductor package is disclosed, which includes: a carrier having at least an opening; a plurality of conductive traces formed on the carrier and in the opening; a first semiconductor element disposed in the opening and electrically connected to the conductive traces; a second semiconductor element disposed on the first semiconductor element in the opening; and a redistribution layer structure formed on the carrier and the second semiconductor element for electrically connecting the conductive traces and the second semiconductor element. Since the semiconductor elements are embedded and therefore positioned in the opening of the carrier, the present invention eliminates the need to perform a molding process before forming the redistribution layer structure and prevents the semiconductor elements from displacement.Type: GrantFiled: October 2, 2015Date of Patent: July 19, 2016Assignee: Siliconware Precision Industries Co., Ltd.Inventors: Yan-Heng Chen, Chun-Tang Lin, Yan-Yi Liao, Hung-Wen Liu, Chieh-Yuan Chi, Hsi-Chang Hsu
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Publication number: 20160141281Abstract: A semiconductor package is disclosed, which includes: a carrier having at least an opening; a plurality of conductive traces formed on the carrier and in the opening; a first semiconductor element disposed in the opening and electrically connected to the conductive traces; a second semiconductor element disposed on the first semiconductor element in the opening; and a redistribution layer structure formed on the carrier and the second semiconductor element for electrically connecting the conductive traces and the second semiconductor element. Since the semiconductor elements are embedded and therefore positioned in the opening of the carrier, the present invention eliminates the need to perform a molding process before forming the redistribution layer structure and prevents the semiconductor elements from displacement.Type: ApplicationFiled: October 2, 2015Publication date: May 19, 2016Inventors: Yan-Heng Chen, Chun-Tang Lin, Yan-Yi Liao, Hung-Wen Liu, Chieh-Yuan Chi, Hsi-Chang Hsu
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Patent number: 9337061Abstract: A fabrication method of a semiconductor package is disclosed, which includes the steps of: providing a carrier; disposing at least a semiconductor element on the carrier; forming an encapsulant on the carrier and the semiconductor element for encapsulating the semiconductor element; removing the carrier; disposing a pressure member on the encapsulant; and forming an RDL structure on the semiconductor element and the encapsulant, thereby suppressing internal stresses through the pressure member so as to mitigate warpage on edges of the encapsulant.Type: GrantFiled: January 9, 2014Date of Patent: May 10, 2016Assignee: Siliconware Precision Industries Co., Ltd.Inventors: Yan-Heng Chen, Chun-Tang Lin, Mu-Hsuan Chan, Chieh-Yuan Chi, Yan-Yi Liao
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Patent number: 9177859Abstract: A semiconductor package is disclosed, which includes: a carrier having at least an opening; a plurality of conductive traces formed on the carrier and in the opening; a first semiconductor element disposed in the opening and electrically connected to the conductive traces; a second semiconductor element disposed on the first semiconductor element in the opening; and a redistribution layer structure formed on the carrier and the second semiconductor element for electrically connecting the conductive traces and the second semiconductor element. Since the semiconductor elements are embedded and therefore positioned in the opening of the carrier, the present invention eliminates the need to perform a molding process before forming the redistribution layer structure and prevents the semiconductor elements from displacement.Type: GrantFiled: August 29, 2013Date of Patent: November 3, 2015Assignee: Siliconware Precision Industries Co., Ltd.Inventors: Yan-Heng Chen, Chun-Tang Lin, Yan-Yi Liao, Hung-Wen Liu, Chieh-Yuan Chi, Hsi-Chang Hsu
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Publication number: 20140342505Abstract: A fabrication method of a semiconductor package is disclosed, which includes the steps of: providing a carrier; disposing at least a semiconductor element on the carrier; forming an encapsulant on the carrier and the semiconductor element for encapsulating the semiconductor element; removing the carrier; disposing a pressure member on the encapsulant; and forming an RDL structure on the semiconductor element and the encapsulant, thereby suppressing internal stresses through the pressure member so as to mitigate warpage on edges of the encapsulant.Type: ApplicationFiled: January 9, 2014Publication date: November 20, 2014Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTDInventors: Yan-Heng Chen, Chun-Tang Lin, Mu-Hsuan Chan, Chieh-Yuan Chi, Yan-Yi Liao
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Publication number: 20140332976Abstract: A semiconductor package is disclosed, which includes: a carrier having at least an opening; a plurality of conductive traces formed on the carrier and in the opening; a first semiconductor element disposed in the opening and electrically connected to the conductive traces; a second semiconductor element disposed on the first semiconductor element in the opening; and a redistribution layer structure formed on the carrier and the second semiconductor element for electrically connecting the conductive traces and the second semiconductor element. Since the semiconductor elements are embedded and therefore positioned in the opening of the carrier, the present invention eliminates the need to perform a molding process before forming the redistribution layer structure and prevents the semiconductor elements from displacement.Type: ApplicationFiled: August 29, 2013Publication date: November 13, 2014Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD.Inventors: Yan-Heng Chen, Chun-Tang Lin, Yan-Yi Liao, Hung-Wen Liu, Chieh-Yuan Chi, Hsi-Chang Hsu
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Publication number: 20140183721Abstract: A fabrication method of a semiconductor package is provided, which includes the steps of: providing a carrier having an adhesive layer and at least a semiconductor element having a protection layer; disposing the semiconductor element on the adhesive layer of the carrier through the protection layer; forming an encapsulant on the adhesive layer of the carrier for encapsulating the semiconductor element; removing the carrier and the adhesive layer to expose the protection layer from the encapsulant; and removing the protection layer to expose the semiconductor element from the encapsulant. Since the semiconductor element is protected by the protection layer against damage during the process of removing the adhesive layer, the product yield is improved.Type: ApplicationFiled: March 18, 2013Publication date: July 3, 2014Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD.Inventors: Yan-Heng Chen, Chiang-Cheng Chang, Jung-Pang Huang, Hsi-Chang Hsu, Yan-Yi Liao