Patents by Inventor Yanan Yu
Yanan Yu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Publication number: 20230036030Abstract: An array substrate of a display device includes a pixel electrode layer on a substrate, which includes active pixel electrodes in an active display region; outermost active pixel electrodes include a first active pixel electrode including a first pixel electrode edge and a second pixel electrode edge; in a first direction, the first pixel electrode edge is between the second pixel electrode edge and a frame region. One of the array substrate and an opposite substrate of the display device includes a common electrode layer including a first extended common electrode which includes a first extended portion extending beyond the first active pixel electrode; a first extended portion edge of the first extended portion and a first substrate edge of the substrate respectively extend in a second direction; in the first direction, the first extended portion edge is located between the first substrate edge and the first pixel electrode edge.Type: ApplicationFiled: August 12, 2021Publication date: February 2, 2023Inventors: Jingwei HOU, Jingyi XU, Yanwei REN, Wenlong ZHANG, Yanan YU, Lei JIA, Yanhao SUN, Guolei ZHI
-
Patent number: 11563036Abstract: The present disclosure provides an array substrate and a fabrication method thereof, a display panel and a display module. The array substrate has a display region and a bonding region for bonding with a circuit board, and including: a data line and a gate line in the display region; and a bump unit in the bonding region. The bump unit includes: a gate line bump layer, which is in a same layer and made of a same material as the gate line, is connected to the data line, and includes a main body portion and a plurality of hollowed-out portions in the main body portion; and a data line bump layer, which is in a same layer and made of a same material as the data line, and covers the main body portion and the plurality of hollowed-out portions of the gate line bump layer.Type: GrantFiled: June 29, 2020Date of Patent: January 24, 2023Assignees: ORDOS YUANSHENG OPTOELECTRONICS CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.Inventors: Shuai Han, Jingyi Xu, Xin Zhao, Wulijibaier Tang, Yanwei Ren, Yanan Yu, Yuelin Wang, Guolei Zhi
-
Patent number: 11536993Abstract: A display panel and a method for fabricating the same, and a display device and a method for charging the same are provided. The display panel includes: an array substrate; an opposite substrate arranged opposite to the array substrate; a charging coil located between the array substrate and the opposite substrate, wherein the charging coil is configured to generate electrical energy through electromagnetic induction. In this way, a battery for charging the battery is integrated inside the display panel to thereby make the display panel thin and lightweight.Type: GrantFiled: October 17, 2018Date of Patent: December 27, 2022Assignees: Ordos Yuansheng Optoelectronics Co., Ltd., BOE Technology Group Co., Ltd.Inventors: Yanwei Ren, Jingyi Xu, Min Liu, Ruize Jiang, Yanan Yu
-
Patent number: 11398439Abstract: The present disclosure provides a display panel and a display device. The display panel includes a display region, a frame region surrounding the display region, a color filter substrate, and an array substrate opposite to the color filter substrate. A black matrix is disposed on a side of the color filter substrate facing the array substrate. The array substrate is provided with a grounding portion located in the frame region. The grounding portion is electrically connected to a portion of the black matrix located in the frame region through a conductive portion. The portion of the black matrix located in the frame region is provided with a first through groove surrounding the display region. The first through groove penetrates the black matrix along a thickness direction of the black matrix. A portion of the first through groove is located between the conductive portion and the display region.Type: GrantFiled: August 4, 2020Date of Patent: July 26, 2022Assignees: ORDOS YUANSHENG OPTOELECTRONICS CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.Inventors: Yanan Yu, Shuai Han, Wenlong Zhang, Peng Li, Huijie Zhang, Jingyi Xu, Yanfeng Li
-
Patent number: 11201179Abstract: Embodiments of the present disclosure provide a thin film transistor assembly, an array substrate and a display panel. The thin film transistor assembly includes a first thin film transistor and a second thin film transistor disposed on a substrate. The first thin film transistor includes a first source electrode, a first drain electrode, and a first active layer. The second thin film transistor includes a second source electrode. The first source electrode is disposed on a side of the first active layer facing towards the substrate. The first drain electrode is disposed on a side of the first active layer facing away from the substrate. An orthogonal projection of the first source electrode on the substrate overlaps an orthogonal projection of the second source electrode on the substrate.Type: GrantFiled: March 20, 2020Date of Patent: December 14, 2021Assignees: ORDOS YUANSHENG OPTOELECTRONICS CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.Inventors: Yanwei Ren, Wulijibaier Tang, Xiaoguang Li, Jingyi Xu, Yuelin Wang, Lei Jia, Yanan Yu, Guolei Zhi
-
Publication number: 20210357081Abstract: The present disclosure provides a touch display panel. Specifically, the touch display panel includes a display area and a non-display area located in a periphery of the display area. In addition, the touch display panel further includes a touch circuit and a peripheral circuit, the peripheral circuit is located in the non-display area; and a conductive pattern. The conductive pattern is adapted to cooperate with at least a portion of the peripheral circuit to form a capacitance, and is further electrically insulated from the touch circuit and the peripheral circuit.Type: ApplicationFiled: May 30, 2018Publication date: November 18, 2021Inventors: Yanyan ZHAO, Jingyi XU, Fuqiang TANG, Yezhou FANG, Yuelin WANG, Yanan YU, Xu ZHANG
-
Patent number: 11175528Abstract: A color filter substrate, a display panel and a display device are provided. The color filter substrate includes a common electrode layer and an upper transparent substrate disposed over the common electrode layer. The common electrode layer is provided with a plurality of slits, and orthographic projections of the slits on the upper glass substrate are within an opaque region of the color filter substrate. Orthographic projections of slits in two adjacent rows on the upper transparent substrate are separated by at least two rows of sub-pixel units; or orthographic projections of slits in two adjacent columns on the upper transparent substrate are separated by at least two columns of sub-pixel units.Type: GrantFiled: April 25, 2018Date of Patent: November 16, 2021Assignees: ORDOS YUANSHENG OPTOELECTRONICS CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.Inventors: Yanfeng Li, Yanan Yu, Yanqing Chen, Wei Li
-
Publication number: 20210351938Abstract: The disclosure provides a method for sharing data based on a blockchain network, a device and a medium. In response to a sharing transaction request including target data of a data provider, a chaining operation is performed on the target data for storing the target data. A sharing smart contract is called to generate a sharing certificate including an identifier of a source organization, an identifier of a target organization and a storage identifier of the target data, and the chaining operation is performed on the sharing certificate for storing the sharing certificate. The target data are shared with the target organization based on the sharing certificate.Type: ApplicationFiled: February 25, 2021Publication date: November 11, 2021Inventors: Wei FAN, Yucao WANG, Yanan YU
-
Patent number: 11145682Abstract: An array substrate which includes a display region and a peripheral region surrounding the display region, the peripheral region includes a data line lead region and a driving circuit region, and the data line lead region is between the driving circuit region and the display region; the driving circuit region includes a driving circuit, the data line lead region includes a the plurality of data line leads, and the plurality of data line leads extend from the display region and are electrically connected with the driving circuit; and the data line lead region includes peripheral data line leads, a region of the peripheral region close to the peripheral data line leads includes at least one retaining wall configured to prevent plasma from affecting the peripheral data line leads. A method for fabricating an array substrate, a display panel, and a display device are also disclosed.Type: GrantFiled: March 13, 2019Date of Patent: October 12, 2021Assignees: ORDOS YUANSHENG OPTOELECTRONICS CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.Inventors: Yanan Yu, Jingyi Xu, Yanwei Ren, Xin Zhao, Xiaokang Wang, Yuelin Wang, Huijie Zhang
-
Publication number: 20210194698Abstract: The embodiments of the present disclosure provide a private data processing method, a device and a medium, and relate to data security technologies. The method includes: initiating a user request to an intermediate server according to an input of a user to request the intermediate server to perform intermediate business processing according to the user request and to initiate a target business processing request to a business server; obtaining business result data encrypted with an account key of the user and fed back by the business server based on the target business processing request from the intermediate server; and using the account key of the user to decrypt the encrypted business result data.Type: ApplicationFiled: September 14, 2020Publication date: June 24, 2021Inventors: Yanan YU, Bo JING, Wei GAO, Hao CHEN, Shi YAN
-
Publication number: 20210118823Abstract: The present disclosure provides a display panel and a display device. The display panel includes a display region, a frame region surrounding the display region, a color filter substrate, and an array substrate opposite to the color filter substrate. A black matrix is disposed on a side of the color filter substrate facing the array substrate. The array substrate is provided with a grounding portion located in the frame region. The grounding portion is electrically connected to a portion of the black matrix located in the frame region through a conductive portion. The portion of the black matrix located in the frame region is provided with a first through groove surrounding the display region. The first through groove penetrates the black matrix along a thickness direction of the black matrix. A portion of the first through groove is located between the conductive portion and the display region.Type: ApplicationFiled: August 4, 2020Publication date: April 22, 2021Inventors: Yanan YU, Shuai HAN, Wenlong ZHANG, Peng LI, Huijie ZHANG, Jingyi XU, Yanfeng LI
-
Publication number: 20210091123Abstract: Embodiments of the present disclosure provide a thin film transistor assembly, an array substrate and a display panel. The thin film transistor assembly includes a first thin film transistor and a second thin film transistor disposed on a substrate. The first thin film transistor includes a first source electrode, a first drain electrode, and a first active layer. The second thin film transistor includes a second source electrode. The first source electrode is disposed on a side of the first active layer facing towards the substrate. The first drain electrode is disposed on a side of the first active layer facing away from the substrate. An orthogonal projection of the first source electrode on the substrate overlaps an orthogonal projection of the second source electrode on the substrate.Type: ApplicationFiled: March 20, 2020Publication date: March 25, 2021Inventors: Yanwei Ren, Wulijibaier Tang, Xiaoguang Li, Jingyi Xu, Yuelin Wang, Lei Jia, Yanan Yu, Guolei Zhi
-
Publication number: 20210066504Abstract: The present disclosure provides a thin film transistor, a manufacturing method thereof, and a display device, and the thin film transistor of the present disclosure includes: a substrate; a gate, a gate insulating layer, an active layer, a source and drain layer sequentially provided on the substrate, and the source and drain layer is correspondingly provided at a first source contact region and a first drain contact region of the active layer. A planarization layer is provided between the gate insulating layer and the substrate, the planarization layer is in a same layer as the gate and in direct contact with the gate, and an upper surface of the planarization layer is flush with an upper surface of the gate.Type: ApplicationFiled: March 18, 2020Publication date: March 4, 2021Inventors: Yanwei REN, Tianlei SHI, Wulijibaier TANG, Jingyi XU, Yanan YU, Chaochao SUN, Min LIU
-
Publication number: 20210028649Abstract: A display panel and a method for fabricating the same, and a display device and a method for charging the same are provided. The display panel includes: an array substrate; an opposite substrate arranged opposite to the array substrate; a charging coil located between the array substrate and the opposite substrate, wherein the charging coil is configured to generate electrical energy through electromagnetic induction. In this way, a battery for charging the battery is integrated inside the display panel to thereby make the display panel thin and lightweight.Type: ApplicationFiled: October 17, 2018Publication date: January 28, 2021Inventors: Yanwei REN, Jingyi XU, Min LIU, Ruize JIANG, Yanan YU
-
Publication number: 20200411562Abstract: The present disclosure provides an array substrate and a fabrication method thereof, a display panel and a display module. The array substrate has a display region and a bonding region for bonding with a circuit board, and including: a data line and a gate line in the display region; and a bump unit in the bonding region. The bump unit includes: a gate line bump layer, which is in a same layer and made of a same material as the gate line, is connected to the data line, and includes a main body portion and a plurality of hollowed-out portions in the main body portion; and a data line bump layer, which is in a same layer and made of a same material as the data line, and covers the main body portion and the plurality of hollowed-out portions of the gate line bump layer.Type: ApplicationFiled: June 29, 2020Publication date: December 31, 2020Inventors: Shuai HAN, Jingyi XU, Xin ZHAO, Wulijibaier TANG, Yanwei REN, Yanan YU, Yuelin WANG, Guolei ZHI
-
Patent number: 10700105Abstract: An array substrate, a method for manufacturing an array substrate, a display panel and a display device are provided. The array substrate includes: a base substrate including a display area and a non-display area; a dummy data line in the non-display area of the base substrate; and an effective data line in the non-display area of the base substrate. The dummy data line is closer to an edge of the base substrate than the effective data line, and a width of the dummy data line is greater than a width of the effective data line.Type: GrantFiled: September 14, 2018Date of Patent: June 30, 2020Assignees: BOE TECHNOLOGY GROUP CO., LTD., ORDOS YUANSHENG OPTOELECTRONICS CO., LTD.Inventors: Yanfeng Li, Yanan Yu, Jingyi Xu, Xin Zhao, Xiaokang Wang, Yanwei Ren, Wei Li
-
Publication number: 20200168639Abstract: An array substrate which includes a display region and a peripheral region surrounding the display region, the peripheral region includes a data line lead region and a driving circuit region, and the data line lead region is between the driving circuit region and the display region; the driving circuit region includes a driving circuit, the data line lead region includes a the plurality of data line leads, and the plurality of data line leads extend from the display region and are electrically connected with the driving circuit; and the data line lead region includes peripheral data line leads, a region of the peripheral region close to the peripheral data line leads includes at least one retaining wall configured to prevent plasma from affecting the peripheral data line leads. A method for fabricating an array substrate, a display panel, and a display device are also disclosed.Type: ApplicationFiled: March 13, 2019Publication date: May 28, 2020Inventors: Yanan YU, Jingyi XU, Yanwei REN, Xin ZHAO, Xiaokang WANG, Yuelin WANG, Huijie ZHANG
-
Publication number: 20200142250Abstract: A color filter substrate, a display panel and a display device are provided. The color filter substrate includes a common electrode layer and an upper transparent substrate disposed over the common electrode layer. The common electrode layer is provided with a plurality of slits, and orthographic projections of the slits on the upper glass substrate are within an opaque region of the color filter substrate. Orthographic projections of slits in two adjacent rows on the upper transparent substrate are separated by at least two rows of sub-pixel units; or orthographic projections of slits in two adjacent columns on the upper transparent substrate are separated by at least two columns of sub-pixel units.Type: ApplicationFiled: April 25, 2018Publication date: May 7, 2020Inventors: Yanfeng LI, Yanan YU, Yanqing CHEN, Wei LI
-
Publication number: 20190164997Abstract: An array substrate, a method for manufacturing an array substrate, a display panel and a display device are provided. The array substrate includes: a base substrate including a display area and a non-display area; a dummy data line in the non-display area of the base substrate; and an effective data line in the non-display area of the base substrate. The dummy data line is closer to an edge of the base substrate than the effective data line, and a width of the dummy data line is greater than a width of the effective data line.Type: ApplicationFiled: September 14, 2018Publication date: May 30, 2019Inventors: Yanfeng Li, Yanan Yu, Jingyi Xu, Xin Zhao, Xiaokang Wang, Yanwei Ren, Wei Li
-
Patent number: D770410Type: GrantFiled: August 27, 2014Date of Patent: November 1, 2016Assignees: Hisense Mobile Communications Technology Co., Ltd., Hisense USA CorporationInventor: Yanan Yu