Abstract: Disclosed is an out-field detection device, comprising an out-field stainless steel substrate, a passivation solution container, a cover glass, an electrochemical workstation, a Raman spectrometer, a Raman laser emission source, and a peristaltic pump.

Abstract: The present disclosure discloses a directional radiation device and its use, which regulates radiation by specifying angles or angular ranges to achieve infrared broadband angular-asymmetric directional thermal radiation. Additionally, the geometric structure of the asymmetric unit can be adjusted to enhance infrared radiation at specific angles; by changing the material of the spectral selection layer, the wavelength of thermal radiation can be controlled, enabling spectrally selective emission in the infrared band. A porous film is attached to the directional radiation device to enhance its reflectivity in the solar wavelength range, thereby truly achieving passive radiative cooling on vertical and inclined surfaces.

Abstract: An RISC-V-based 3D interconnected multi-core processor architecture and a working method thereof. The RISC-V-based 3D interconnected multi-core processor architecture includes a main control layer, a micro core array layer and an accelerator layer, wherein the main control layer includes a plurality of main cores which are RISC-V instruction set CPU cores, the micro core array layer includes a plurality of micro unit groups including a micro core, a data storage unit, an instruction storage unit and a linking controller, wherein the micro core is an RISC-V instruction set CPU core that executes partial functions of the main core; the accelerator layer is configured to optimize a running speed of space utilization for accelerators meeting specific requirements, wherein some main cores in the main control layer perform data interaction with the accelerator layer, the other main cores interact with the micro core array layer.

Abstract: An RISC-V-based 3D interconnected multi-core processor architecture and a working method thereof. The RISC-V-based 3D interconnected multi-core processor architecture includes a main control layer, a micro core array layer and an accelerator layer, wherein the main control layer includes a plurality of main cores which are RISC-V instruction set CPU cores, the micro core array layer includes a plurality of micro unit groups including a micro core, a data storage unit, an instruction storage unit and a linking controller, wherein the micro core is an RISC-V instruction set CPU core that executes partial functions of the main core; the accelerator layer is configured to optimize a running speed of space utilization for accelerators meeting specific requirements, wherein some main cores in the main control layer perform data interaction with the accelerator layer, the other main cores interact with the micro core array layer.

Abstract: The present disclosure relates to a touch and display driver integrated assembly, a method of manufacturing the same, and an electronic apparatus. The touch and display driver integrated assembly includes: a TFT structure layer provided on a substrate plate; a first protective layer, a first conductive layer, a plurality of first sensing signal lines, and a second protective layer, sequentially arranged above the TFT structure layer; wherein the plurality of first sensing signal lines are on an upper surface of the first conductive layer; and the second protective layer covers a surface formed by the first sensing signal lines and the first conductive layer.

Abstract: The present disclosure relates to a touch and display driver integrated assembly, a method of manufacturing the same, and an electronic apparatus. The touch and display driver integrated assembly includes: a TFT structure layer provided on a substrate plate; a first protective layer, a first conductive layer, a plurality of first sensing signal lines, and a second protective layer, sequentially arranged above the TFT structure layer; wherein the plurality of first sensing signal lines are on an upper surface of the first conductive layer; and the second protective layer covers a surface formed by the first sensing signal lines and the first conductive layer.

Abstract: The present disclosure provides a method for manufacturing a slit electrode, the slit electrode, and a display panel. The method includes steps of forming a first photoresist pattern on a passivation layer, the first photoresist pattern being of a shape identical to a slit of the slit electrode, forming a slit electrode pattern on the passivation layer with the first photoresist pattern, the slit electrode pattern being covering with a second photoresist pattern which has a shape identical to the slit electrode; and removing the first photoresist pattern and the second photoresist pattern.

Abstract: An embodiment of the present disclosure discloses an array substrate, including a base substrate, a drain electrode of a thin film transistor and a pixel electrode corresponding to the drain electrode arranged on the base substrate, wherein the pixel electrode and the drain electrode are attached to each other.

Abstract: The present disclosure provides a method for manufacturing a slit electrode, the slit electrode, and a display panel. The method includes steps of forming a first photoresist pattern on a passivation layer, the first photoresist pattern being of a shape identical to a slit of the slit electrode, forming a slit electrode pattern on the passivation layer with the first photoresist pattern, the slit electrode pattern being covering with a second photoresist pattern which has a shape identical to the slit electrode; and removing the first photoresist pattern and the second photoresist pattern.

Abstract: The invention provides a display motherboard, a display panel and a display device for solving the problem of unsmooth cutting of the display motherboard in the prior art during cutting. In the display motherboard, the display panel and the display device provided by the present invention, a cutting area of the display motherboard is provided with a raised portion on one side close to sealant, and the raised portion can make the cutting stress more concentrated when the display motherboard is cut, so that adhesion of the sealant to substrates is reduced and thus the display motherboard is cut more smoothly.

Abstract: The invention provides a display motherboard, a display panel and a display device for solving the problem of unsmooth cutting of the display motherboard in the prior art during cutting. In the display motherboard, the display panel and the display device provided by the present invention, a cutting area of the display motherboard is provided with a raised portion on one side close to sealant, and the raised portion can make the cutting stress more concentrated when the display motherboard is cut, so that adhesion of the sealant to substrates is reduced and thus the display motherboard is cut more smoothly.

Abstract: An embodiment of the present disclosure discloses an array substrate, including a base substrate, a drain electrode of a thin film transistor and a pixel electrode corresponding to the drain electrode arranged on the base substrate, wherein the pixel electrode and the drain electrode are attached to each other.

Abstract: The invention provides a display motherboard, a display panel and a display device for solving the problem of unsmooth cutting of the display motherboard in the prior art during cutting. In the display motherboard, the display panel and the display device provided by the present invention, a cutting area of the display motherboard is provided with a raised portion on one side close to sealant, and the raised portion can make the cutting stress more concentrated when the display motherboard is cut, so that adhesion of the sealant to substrates is reduced and thus the display motherboard is cut more smoothly.

Abstract: A plasma display apparatus is disclosed. A scan driver of the plasma display apparatus supplies a voltage of a scan signal of a negative polarity direction and a voltage of a sustain signal to a scan electrode using one voltage source. Further, a sustain driver of the plasma display apparatus supplies a voltage of a sustain signal and a sustain bias voltage to a sustain electrode using one voltage source.

Abstract: An apparatus and method for operating a plasma display panel (PDP) capable of removing or preventing peaking noise or voltage spike is disclosed. After substantial video data is completely recorded in the address electrode and/or after the last scan pulse or signal on the last scan electrode, the apparatus floats the address electrode or maintains the address electrode at a predetermined voltage, such that it prevents peaking noise from being received from the scan electrode and the sustain electrode, resulting in no erroneous discharge. As a result, the apparatus improves an image quality of the PDP, and increases operation efficiency of the PDP including use of single scan rather than dual scan.

Abstract: A plasma display apparatus and a driving method thereof are disclosed. The plasma display apparatus comprises a plasma display panel in which a plurality of electrodes are formed, an energy storage unit for storing energy applied to the electrodes, and a protector for maintaining a voltage level of the energy stored in the energy storage unit at a predetermined voltage range.