Patents by Inventor Yang-Ann Chu

Yang-Ann Chu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11972971
    Abstract: A wafer lift pin system is capable of dynamically modulating or adjusting the flow of gas into and out of lift pins of the wafer lift pin system to achieve and maintain a consistent pressure in supply lines that supply the gas to the lift pins. This enables the wafer lift pin system to precisely control the speed, acceleration, and deceleration of the lift pins to achieve consistent and repeatable lift pin rise times and fall times. A controller and various sensors and valves may control the gas pressures in the wafer lift pin system based on various factors, such as historic rise times, historic fall times, and/or the condition of the lift pins. This enables smoother and more controlled automatic operation of the lift pins, which reduces and/or minimizes wafer shifting and wafer instability, which may reduce processing defects and maintain or improve processing yields.
    Type: Grant
    Filed: March 5, 2021
    Date of Patent: April 30, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yu-Chen Chen, Yi-Fam Shiu, Cheng-Lung Wu, Yang-Ann Chu, Jiun-Rong Pai
  • Patent number: 11923225
    Abstract: A method includes initiating a gas flow of a first gas parallel to a wall of an interface module to create an air curtain across an opening defined in the wall. The method includes moving an interface door to reveal the opening, wherein the air curtain restrains a second gas within the interface module from passing through the opening. The method includes transferring a semiconductor wafer through the opening and moving the interface door to cover the opening. The method includes halting the gas flow of the first gas after moving the interface door to cover the opening.
    Type: Grant
    Filed: August 16, 2021
    Date of Patent: March 5, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LIMITED
    Inventors: Yi-Fam Shiu, Cheng-Lung Wu, Yang-Ann Chu, Hsu-Shui Liu, Jiun-Rong Pai
  • Patent number: 11915957
    Abstract: A multiple die container load port may include a housing with an opening, and an elevator to accommodate a plurality of different sized die containers. The multiple die container load port may include a stage supported by the housing and moveable within the opening of the housing by the elevator. The stage may include one or more positioning mechanisms to facilitate positioning of the plurality of different sized die containers on the stage, and may include different portions movable by the elevator to accommodate the plurality of different sized die containers. The multiple die container load port may include a position sensor to identify one of the plurality of different sized die containers positioned on the stage.
    Type: Grant
    Filed: January 7, 2022
    Date of Patent: February 27, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chih-Hung Huang, Cheng-Lung Wu, Yi-Fam Shiu, Yu-Chen Chen, Yang-Ann Chu, Jiun-Rong Pai
  • Patent number: 11915954
    Abstract: A die sorter tool may include a first conveyor, and a first lane to receive, from one or more load ports and via the first conveyor, a carrier with a set of dies. The die sorter tool may include a die flip module to receive the carrier from the first lane, manipulate one or more dies of the set of dies by changing orientations of the one or more dies, and return the one or more dies to the carrier after manipulating the one or more dies and without changing positions of the one or more dies within the carrier. The die sorter tool may include a second conveyor, and a second lane to receive, via the second conveyor, the carrier from the die flip module, and provide, via the first conveyor, the carrier to the one or more load ports.
    Type: Grant
    Filed: January 30, 2023
    Date of Patent: February 27, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chih-Hung Huang, Cheng-Lung Wu, Zheng-Lin He, Yang-Ann Chu, Jiun-Rong Pai, Hsuan Lee
  • Publication number: 20240045343
    Abstract: A method includes providing a workpiece to a semiconductor apparatus, the workpiece including a material layer including a first strip having: a first plurality of exposure fields; and a second plurality of exposure fields alternatingly arranged with the first plurality of exposure fields. The method further includes: scanning the first strip along a first scan route from a first side of the workpiece to a second side of the workpiece to generate first topography measurement data; scanning the first strip along a second scan route from the second side to the first side to generate second topography measurement data; and exposing the first plurality of exposure fields and exposing the second plurality of exposure fields according to the first topography measurement data and the second topography measurement data.
    Type: Application
    Filed: October 23, 2023
    Publication date: February 8, 2024
    Inventors: YUNG-YAO LEE, YEH-CHIN WANG, YANG-ANN CHU, YUNG-HSIANG CHEN, YUNG-CHENG CHEN
  • Patent number: 11851224
    Abstract: In certain embodiments, a system includes: an inspection station configured to receive a die vessel, wherein the inspection station is configured to inspect the die vessel for defects; a desiccant station configured to receive the die vessel from the inspection station, wherein the desiccant station is configured to add a desiccant to the die vessel; a bundle station configured to receive the die vessel from the desiccant station, wherein the bundle station is configured to combine the die vessel with another die vessel as a die bundle; and a bagging station configured to receive the die bundle from the bundle station, wherein the bagging station is configured to dispose the die bundle in a die bag and to heat seal the die bag with the die bundle inside.
    Type: Grant
    Filed: March 3, 2022
    Date of Patent: December 26, 2023
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Tsung-Sheng Kuo, Hsu-Shui Liu, Jiun-Rong Pai, Yang-Ann Chu, Chieh-Chun Lin, Shine Chen
  • Patent number: 11835866
    Abstract: A method includes: providing a workpiece to a semiconductor apparatus, the workpiece including a material layer, wherein the material layer includes a first strip having a first plurality of exposure fields configured to be exposed in a first direction and a second plurality of exposure fields configured to be exposed in a second direction different from the first direction; scanning the first strip along a first scan route in the first direction to generate first topography measurement data; scanning the first strip along a second scan route in the second direction to generate second topography measurement data; and exposing the first plurality of exposure fields according to the first topography measurement data and exposing the second plurality of exposure fields according to the second topography measurement data.
    Type: Grant
    Filed: October 31, 2022
    Date of Patent: December 5, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Yung-Yao Lee, Yeh-Chin Wang, Yang-Ann Chu, Yung-Hsiang Chen, Yung-Cheng Chen
  • Publication number: 20230386877
    Abstract: A system comprises a front opening universal pod (FOUP) configured to hold one or more semiconductor wafers and a load dock having a stage and a receiving portion extending above the stage. The FOUP is positioned on the stage. A fan filter unit (FFU) positioned above the load dock. An air flow optimizer device is disposed on the receiving portion and under the FFU. The air flow optimizer device has an inlet opening and an outlet opening and a channel extends between the inlet opening and the outlet opening.
    Type: Application
    Filed: July 25, 2023
    Publication date: November 30, 2023
    Inventors: Yi-Fam Shiu, Cheng-Lung Wu, Yang-Ann Chu, Hsu-Shui Liu, Jiun-Rong Pai
  • Publication number: 20230372983
    Abstract: A cleaning apparatus, method, and dry chamber are provided for cleaning a wafer carrier that holds wafers as part of a semiconductor fabrication process. The cleaning apparatus includes a wet chamber that receives the wafer carrier to be washed and a reservoir in fluid communication with the wet chamber. The reservoir stores a cleaning liquid that is introduced to the wafer carrier within the wet chamber during a washing operation, and a dry chamber is spaced apart from the wet chamber. The dry chamber receives the wafer carrier after the wafer carrier is washed in the wet chamber and holds the wafer carrier during a drying operation. A transport system transports the wafer carrier between the wet chamber and the dry chamber during a cleaning process.
    Type: Application
    Filed: August 8, 2023
    Publication date: November 23, 2023
    Inventors: Eason CHEN, Yi-Fam SHIU, Sung-Chun YANG, Hsu-Shui LIU, Yang-Ann CHU, Jiun-Rong PAI
  • Publication number: 20230369082
    Abstract: The present disclosure provides an embodiment of a semiconductor fabrication system. The semiconductor fabrication system includes an equipment front end module with a load port to transfer semiconductor wafers to the equipment front end module from a wafer carrier; and a wafer humidity control device embedded in the equipment front end module and configured to generate an air curtain to protect the semiconductor wafers. The wafer humidity control device further includes a gas entry layer with a gas inlet to receive a gas; a uniform layer integrated with the gas entry layer and designed to redistribute the gas; and a diversion structure having multiple pieces assembled together to hold the uniform layer and integrated with the gas entry layer.
    Type: Application
    Filed: August 10, 2022
    Publication date: November 16, 2023
    Inventors: Cheng-Lung Wu, Yi-Fam Shiu, Yang-Ann Chu, Hsu-Shui Liu
  • Patent number: 11813649
    Abstract: A cleaning apparatus, method, and dry chamber are provided for cleaning a wafer carrier that holds wafers as part of a semiconductor fabrication process. The cleaning apparatus includes a wet chamber that receives the wafer carrier to be washed and a reservoir in fluid communication with the wet chamber. The reservoir stores a cleaning liquid that is introduced to the wafer carrier within the wet chamber during a washing operation, and a dry chamber is spaced apart from the wet chamber. The dry chamber receives the wafer carrier after the wafer carrier is washed in the wet chamber and holds the wafer carrier during a drying operation. A transport system transports the wafer carrier between the wet chamber and the dry chamber during a cleaning process.
    Type: Grant
    Filed: May 29, 2020
    Date of Patent: November 14, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LIMITED
    Inventors: Eason Chen, Yi-Fam Shiu, Sung-Chun Yang, Hsu-Shui Liu, Yang-Ann Chu, Jiun-Rong Pai
  • Publication number: 20230360939
    Abstract: In certain embodiments, a workstation includes: a cleaning station configured to clean a die vessel, wherein the die vessel is configured to secure a semiconductor die; an inspection station configured to inspect the die vessel after cleaning to determine whether the die vessel is identified as passing inspection; and a conveyor configured to move the die vessel between the cleaning station and the inspection station.
    Type: Application
    Filed: July 14, 2023
    Publication date: November 9, 2023
    Inventors: Tsung-Sheng KUO, Guan-Wei HUANG, Chih-Hung HUANG, Yang-Ann CHU, Hsu-Shui LIU, Jiun-Rong PAI
  • Publication number: 20230335424
    Abstract: A multiple transport carrier docking device may be capable of storing and/or staging a plurality of transport carriers in a chamber of the multiple transport carrier docking device, and may be capable of forming an air-tight seal around a transport carrier in the chamber. Semiconductor wafers in the transport carrier may be accessed by a wafer transport tool while the air-tight seal around the transport carrier prevents and/or reduces the likelihood that contaminants in the semiconductor fabrication facility will reach the semiconductor wafers. The air-tight seal around the transport carrier may reduce defects of the semiconductor wafers that might otherwise be caused by the contaminants, may increase manufacturing yield and quality in the semiconductor fabrication facility, and/or may permit the continued reduction in device and/or feature sizes of integrated circuits and/or semiconductor devices that are to be formed on semiconductor wafers.
    Type: Application
    Filed: May 15, 2023
    Publication date: October 19, 2023
    Inventors: Chih-Hung HUANG, Cheng-Lung WU, Yang-Ann CHU, Hsuan LEE, Jiun-Rong PAI
  • Patent number: 11786947
    Abstract: A cleaning apparatus, method, and dry chamber are provided for cleaning a wafer carrier that holds wafers as part of a semiconductor fabrication process. The cleaning apparatus includes a wet chamber that receives the wafer carrier to be washed and a reservoir in fluid communication with the wet chamber. The reservoir stores a cleaning liquid that is introduced to the wafer carrier within the wet chamber during a washing operation, and a dry chamber is spaced apart from the wet chamber. The dry chamber receives the wafer carrier after the wafer carrier is washed in the wet chamber and holds the wafer carrier during a drying operation. A transport system transports the wafer carrier between the wet chamber and the dry chamber during a cleaning process.
    Type: Grant
    Filed: July 27, 2022
    Date of Patent: October 17, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LIMITED
    Inventors: Eason Chen, Yi-Fam Shiu, Sung-Chun Yang, Hsu-Shui Liu, Yang-Ann Chu, Jiun-Rong Pai
  • Patent number: 11784073
    Abstract: An apparatus for handling wafer carriers in a semiconductor fabrication facility (FAB) is disclosed. In one example, the apparatus includes: a table configured to receive a wafer carrier having a first door and operable to hold a plurality of wafers; an opening mechanism configured to open the first door of the wafer carrier; and a door storage space configured to store the first door. The apparatus may be either located on a floor of the FAB or physically coupled to a ceiling of the FAB.
    Type: Grant
    Filed: March 3, 2022
    Date of Patent: October 10, 2023
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Tsung-Sheng Kuo, Yang-Ann Chu, Alan Yang, Vic Huang, Hsu-Shui Liu, Jiun-Rong Pai
  • Publication number: 20230317505
    Abstract: In an embodiment, a system includes: a tool port of a semiconductor processing tool; a processing port with an internal processing port location and an external processing port location; a robot configured to move a die vessel between the internal processing port location and the tool port; and an actuator configured to move the die vessel between the internal processing port location and the external processing port location.
    Type: Application
    Filed: June 6, 2023
    Publication date: October 5, 2023
    Inventors: Tsung-Sheng KUO, Yi-Fam SHIU, Eason CHEN, Yang-Ann CHU, Jiun-Rong PAI
  • Publication number: 20230302589
    Abstract: The present disclosure relates to systems and methods for affixing and/or removing a fastener from a wafer-carrying pod. The system includes a robotic arm with a screw tool assembly disposed at the far end of the robotic arm. The screw tool assembly includes a lower sleeve configured to receive a fastener. A screwdriver is disposed within an upper sleeve of the screw tool assembly, and a motor is provided to rotate the screwdriver. In use, the screw tool assembly is positioned over the fastener so the lower sleeve surrounds the fastener and the screwdriver engages the fastener. The screwdriver unscrews the fastener from the pod, and the fastener head is received within the lower sleeve.
    Type: Application
    Filed: May 19, 2023
    Publication date: September 28, 2023
    Inventors: Yu-Chen Chen, Chih-Hung Huang, Cheng-Lung Wu, Yang-Ann Chu, Jiun-Rong Pai
  • Publication number: 20230298919
    Abstract: Apparatus and methods for handling die carriers are disclosed. In one example, a disclosed apparatus includes: a load port configured to load a die carrier operable to hold a plurality of dies into a processing tool; and a lane changer coupled to the load port and configured to move at least one die in the die carrier to an input of the processing tool and transfer the at least one die into the processing tool for processing the at least one die.
    Type: Application
    Filed: May 23, 2023
    Publication date: September 21, 2023
    Inventors: Tsung-Sheng KUO, Kai-Chieh HUANG, Wei-Ting HSIAO, Yang-Ann CHU, I-Lun YANG, Hsuan LEE
  • Patent number: 11752582
    Abstract: The present disclosure relates to systems and methods for affixing and/or removing a fastener from a wafer-carrying pod. The system includes a robotic arm with a screw tool assembly disposed at the far end of the robotic arm. The screw tool assembly includes a lower sleeve configured to receive a fastener. A screwdriver is disposed within an upper sleeve of the screw tool assembly, and a motor is provided to rotate the screwdriver. In use, the screw tool assembly is positioned over the fastener so the lower sleeve surrounds the fastener and the screwdriver engages the fastener. The screwdriver unscrews the fastener from the pod, and the fastener head is received within the lower sleeve.
    Type: Grant
    Filed: February 15, 2022
    Date of Patent: September 12, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Yu-Chen Chen, Chih-Hung Huang, Cheng-Lung Wu, Yang-Ann Chu, Jiun-Rong Pai
  • Patent number: 11735455
    Abstract: A system comprises a front opening universal pod (FOUP) configured to hold one or more semiconductor wafers and a load dock having a stage and a receiving portion extending above the stage. The FOUP is positioned on the stage. A fan filter unit (FFU) positioned above the load dock. An air flow optimizer device is disposed on the receiving portion and under the FFU. The air flow optimizer device has an inlet opening and an outlet opening and a channel extends between the inlet opening and the outlet opening.
    Type: Grant
    Filed: September 2, 2021
    Date of Patent: August 22, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Yi-Fam Shiu, Cheng-Lung Wu, Yang-Ann Chu, Hsu-Shui Liu, Jiun-Rong Pai