Abstract: An LED and a light emitting device are provided, which includes an epitaxial structure, a transparent conductive layer, an insulating structure and a metal reflective layer. The epitaxial structure includes a first semiconductor layer, an active layer and a second semiconductor layer. The transparent conductive layer is disposed on the second semiconductor layer. The insulating structure is disposed on the transparent conductive layer, and an opening is defined in the insulating structure. The transparent conductive layer is exposed from the opening. A step portion is formed on a sidewall of the opening, and divides the opening into a first opening and a second opening. An opening width of the first opening is smaller than that of the second opening. The metal reflective layer is disposed on the insulating structure. The metal reflective layer fills the first opening and the second opening, and forms electrical contact with the second semiconductor layer.

Abstract: A display driving device includes an emission circuit and a positive feedback circuit. The emission circuit is coupled to a first node. The emission circuit emits light according to a forward signal, a reverse signal, and a voltage level of the first node. The forward signal and the reverse signal are inversed phase of each other. The positive feedback circuit discharges the first node according to sweep signal.

Abstract: A method is provided including forming a first layer over a substrate and forming an adhesion layer over the first layer. The adhesion layer has a composition including an epoxy group. A photoresist layer is formed directly on the adhesion layer. A portion of the photoresist layer is exposed to a radiation source. The composition of the adhesion layer and the exposed portion of the photoresist layer cross-link using the epoxy group. Thee photoresist layer is then developed (e.g., by a negative tone developer) to form a photoresist pattern feature, which may overlie the formed cross-linked region.

Abstract: An image encoding/decoding method is provided. An image decoding method of the present invention may comprise deriving an intra-prediction mode of a current luma block, deriving an intra-prediction mode of a current chroma block based on the intra-prediction mode of the current luma block, generating a prediction block of the current chroma block based on the intra-prediction mode of the current chroma block, and the deriving of an intra-prediction mode of a current chroma block may comprise determining whether or not CCLM (Cross-Component Linear Mode) can be performed for the current chroma block.

Abstract: Provided is an artificial intelligence model training method of an electronic apparatus, the artificial intelligence model training method including primarily updating a second artificial intelligence based on first auscultation sound data and output data of a first artificial intelligence model, updating the first artificial intelligence model based on second auscultation sound data, bioacoustics data with noise removed from the second auscultation sound data, output data of the second artificial intelligence model, and output data of the primarily updated second artificial intelligence model, secondarily updating the primarily updated second artificial intelligence model based on third auscultation sound data and output data of the updated first artificial intelligence model, and tertiarily updating the secondarily updated second artificial intelligence model based on a reward corresponding to output data of the secondarily updated second artificial intelligence model for fourth auscultation sound data.

Abstract: A semiconductor device includes: a substrate comprising a magnetic tunneling junction (MTJ) region and a logic region; a first MTJ on the MTJ region; a first metal interconnection on the logic region; and a cap layer extending from a sidewall of the first MTJ to a sidewall of the first metal interconnection. Preferably, the cap layer on the MTJ region and the cap layer on the logic region comprise different thicknesses.

Abstract: An IC includes a first standard cell (SC1) having a first circuit area (CA1) and a first transition area (TA1) placed on an edge of the CA1; and a SC2 having a CA2 and a TA2 placed on an edge of CA2?. CA1 includes a first and a second active region (AR1 and AR2) longitudinally oriented along a first direction (D1), and a first gate stack (G1) along a D2?D1 and extending over AR1 and AR2. G1 includes a first gate segment (GS1) contacting AR1 and a GS2 contacting AR2. GS1 and GS2 are different in composition. GS1 and GS2 are associated with a pFET and a nFET, respectively. TA1 includes a G2 longitudinally oriented along D2 and spans between opposite cell edges of the SC1. G2 is a lengthwise uniform gate stack. SC2 is placed in abutment with the SC1 such that TA1 and TA2 share a common edge.

Abstract: An electronic device includes a display and a sensor underneath the display. The display has a full pixel density region and a reduced pixel density region. Compared to pixels in the full pixel density region, pixels in the reduced pixel density region can be controlled using overdriven power supply voltages, overdriven scan control signals, different initialization and reset voltages, and can include capacitors and transistors with different physical and electrical characteristics. Gate drivers provide scan signals to pixels in the full pixel density region, whereas overdrive buffers provide overdrive scan signals to pixels in the reduced pixel density region. The pixels in the full pixel density region and the pixels in the reduced pixel density region can be controlled using different black level or gamma settings for each color channel and can be adjusted physically to match luminance, color, as well as to mitigate differences in temperature and aging impact.

Abstract: The present invention provides a solid oxide fuel cell including a fuel electrode support including Ni-YSZ; a functional layer positioned on the fuel electrode support; an electrolyte layer positioned on the functional layer; an interlayer positioned on the electrolyte layer; and an air electrode layer positioned on the interlayer, wherein the functional layer includes gadolinium-doped ceria (GDC) nanoparticles dispersed.

Abstract: An interface device and a signal transceiving method thereof are provided. The interface device includes a slave circuit and a master circuit. The slave circuit is coupled to the master circuit and includes a first programmable delay line, a first output clock generator, and a first phase detector. The first programmable delay line provides a first adjusting delay amount according to a first adjust signal, and generates a first delayed clock signal by delaying a first clock signal according to the first adjusting delay amount. The first output clock generator generates a second clock signal according to the first delayed clock signal. The first phase detector detects a phase difference of the first clock signal and the second clock signal to generate first phase lead or lag information. The first adjust signal is generated according to the first phase lead or lag information.

Abstract: Disclosed are compounds of formula (I): in which L1, L2, LD1, LD2, R5, and R6 are defined. Also provided are pharmaceutical compositions containing such a compound a method of treating cancer using the compound.

Abstract: A circuit, for a touch panel, comprises a plurality of touch signal processing circuits, coupled to a plurality of sensors of the touch panel to receive a plurality of touch signals, wherein when a first sensor within the plurality of sensors is touched, the first sensor generates a first touch signal of the plurality of touch signals; and a controller, coupled to the plurality of touch signal processing circuits, configured to adjust the first touch signal according to the plurality of touch signals except the first touch signal.

Abstract: Provided is an electronic package, in which a conductive structure and an encapsulation layer covering the conductive structure are arranged on one side of a carrier structure having a circuit layer, and an electronic component is arranged on the other side of the carrier structure. The rigidity of the carrier structure is increased by the encapsulation layer, and problems such as warpage or wavy deformations caused by increasing the volume of the electronic package due to functional requirements can be eliminated.

Abstract: A cable includes: a pair of core wires each including an inner conductor and an inner insulating layer covering the inner conductor; an insulating layer covering the pair of core wires; a shielding layer covering the insulating layer; and an outer layer covering the shielding layer; wherein the inner insulating layer includes a first inner insulating layer and a second inner insulating layer, the first inner insulating layer is made of solid material and covers the inner conductor by extrusion molding, the second inner insulating layer is made of foamed material and wraps the first inner insulating layer in a winding way, the insulating layer includes a first insulating layer and a second insulating layer, the first insulating layer covers the pair of core wires in a winding way, and the second insulating layer covers the first insulating layer by extrusion molding.

Abstract: An electronic device is provided. The electronic device includes a panel, a protective substrate, and a first light-shielding structure. The panel has an active area and a peripheral area. The peripheral area is adjacent to the active area. The protective substrate is disposed opposite to the panel. The first light-shielding structure is disposed on a surface of the protective substrate and corresponds to the peripheral area. A portion of the first light-shielding structure that overlaps the peripheral area has at least one opening.

Abstract: A memory device and method of making the same are disclosed. The memory device includes transistor devices located in both a memory region and a logic region of the device. Transistor devices in the memory region include sidewall spacers having a first oxide layer over a side surface of a gate structure, a first nitride layer over the first oxide layer, a second oxide layer over the first nitride layer, and a second nitride layer over the second oxide layer. Transistor devices in the logic region include sidewall spacers having a first oxide layer over a side surface of a gate structure, a first nitride layer over the first oxide layer, and a second nitride layer over the first nitride layer.

Abstract: Disclosed are an isolation method for a high-performance computer system, and a high-performance computer system. The isolation method comprises node-level isolation performed. The node-level isolation comprises: configuring a routing table for each computing node, and configuring, in the routing table, valid routing information for computing node pairs; when any one source computing node needs to communicate with a target computing node, determining, by lookup, whether valid routing information exists between the source computing node and the target computing node according to the configured routing table; if so, allowing the source computing node to communicate with the target computing node; otherwise, forbidding the source computing node from communicating with the target computing node.

Abstract: The disclosure provides a method of manufacturing a semiconductor device including bonding a second device wafer to a first device wafer, such that a first bonding interface including a dielectric-to-dielectric bonding interface and a metal-to-metal bonding interface is formed between the first device wafer and the second device wafer, wherein the second device wafer is electrically coupled to the first device wafer, and a function of the first device wafer and the second device wafer are the same kind of device wafer. A semiconductor device is also provided.

Abstract: A smart cosmetic device includes a main body, an optical detection module and a cosmetic applicator. The optical detection module is disposed within the main body and adapted to detect a predefined feature of a target object. The cosmetic applicator is disposed within the main body and has an accommodated chamber where inside cosmetic material is disposed. The cosmetic applicator is adapted to spray the cosmetic material to a specific area of the target object in accordance with the predefined feature.