Abstract: A method of forming a semiconductor device includes forming active regions, forming S/D regions, forming MD contact structures and forming gate lines resulting in corresponding transistors that define a first time delay circuit having a first input configured to receive a first clock signal and having a first output configured to generate a second clock signal from the first clock signal; and corresponding transistors that define a second time delay circuit having a second input configured to receive the second clock signal and having a second output configured to generate a third clock signal from the first clock signal; forming a first gate via-connector in direct contact with the first gate line atop the first-type active region in the first area; and forming a second gate via-connector in direct contact with the second gate line atop the second-type active region in the second area.

Abstract: A printed circuit board and a power copper surface configuration method are provided. The method includes the following steps: configuring a first power supply component, a second power supply component, a power sink component, a convergence copper surface portion, a first grounding copper surface portion and a second grounding copper surface portion; determining whether currents of the first and second power supply components flow to the power sink component through the convergence copper surface portion; when the currents of the first and second power supply components flow to the power sink component through the convergence copper surface portion, determining whether the convergence copper surface portion conforms to a current balancing design of the printed circuit board according to at least one of first and second tolerable difference values and an average current. When the convergence copper surface portion conforms to the current balancing design, the method is ended.

Abstract: A printed circuit board and a power copper surface configuration method are provided. The method includes the following steps: configuring a first power supply component, a second power supply component, a power sink component, a convergence copper surface portion, a first grounding copper surface portion and a second grounding copper surface portion; determining whether currents of the first and second power supply components flow to the power sink component through the convergence copper surface portion; when the currents of the first and second power supply components flow to the power sink component through the convergence copper surface portion, determining whether the convergence copper surface portion conforms to a current balancing design of the printed circuit board according to at least one of first and second tolerable difference values and an average current. When the convergence copper surface portion conforms to the current balancing design, the method is ended.