Patents by Inventor Yang-Chih Hsueh

Yang-Chih Hsueh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10867831
    Abstract: A method and apparatus for bonding semiconductor devices are disclosed. In an embodiment, the method may include attaching a first die to a flip head of a flip module, flipping the first die with the flip module, removing the first die from the flip module after flipping the first die, inspecting the flip head of the flip module for contamination after removing the first die, cleaning the flip head with an in situ cleaning module after inspecting the flip head, and attaching a second die to the flip head after cleaning the flip head.
    Type: Grant
    Filed: August 14, 2020
    Date of Patent: December 15, 2020
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yan-Zuo Tsai, Yang-Chih Hsueh, Chia-Yin Chen, Fu-Kang Tien, Ebin Liao, Wen-Chih Chiou
  • Publication number: 20200373185
    Abstract: A method and apparatus for bonding semiconductor devices are disclosed. In an embodiment, the method may include attaching a first die to a flip head of a flip module, flipping the first die with the flip module, removing the first die from the flip module after flipping the first die, inspecting the flip head of the flip module for contamination after removing the first die, cleaning the flip head with an in situ cleaning module after inspecting the flip head, and attaching a second die to the flip head after cleaning the flip head.
    Type: Application
    Filed: August 14, 2020
    Publication date: November 26, 2020
    Inventors: Yan-Zuo Tsai, Yang-Chih Hsueh, Chia-Yin Chen, Fu-Kang Tien, Ebin Liao, Wen-Chih Chiou
  • Patent number: 10748803
    Abstract: A method and apparatus for bonding semiconductor devices are disclosed. In an embodiment, the method may include attaching a first die to a flip head of a flip module, flipping the first die with the flip module, removing the first die from the flip module after flipping the first die, inspecting the flip head of the flip module for contamination after removing the first die, cleaning the flip head with an in situ cleaning module after inspecting the flip head, and attaching a second die to the flip head after cleaning the flip head.
    Type: Grant
    Filed: April 22, 2019
    Date of Patent: August 18, 2020
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yan-Zuo Tsai, Yang-Chih Hsueh, Chia-Yin Chen, Fu-Kang Tien, Ebin Liao, Wen-Chih Chiou
  • Publication number: 20190244851
    Abstract: A method and apparatus for bonding semiconductor devices are disclosed. In an embodiment, the method may include attaching a first die to a flip head of a flip module, flipping the first die with the flip module, removing the first die from the flip module after flipping the first die, inspecting the flip head of the flip module for contamination after removing the first die, cleaning the flip head with an in situ cleaning module after inspecting the flip head, and attaching a second die to the flip head after cleaning the flip head.
    Type: Application
    Filed: April 22, 2019
    Publication date: August 8, 2019
    Inventors: Yan-Zuo Tsai, Yang-Chih Hsueh, Chia-Yin Chen, Fu-Kang Tien, Ebin Liao, Wen-Chih Chiou
  • Patent number: 10269611
    Abstract: A method and apparatus for bonding semiconductor devices are disclosed. In an embodiment, the method may include attaching a first die to a flip head of a flip module, flipping the first die with the flip module, removing the first die from the flip module after flipping the first die, inspecting the flip head of the flip module for contamination after removing the first die, cleaning the flip head with an in situ cleaning module after inspecting the flip head, and attaching a second die to the flip head after cleaning the flip head.
    Type: Grant
    Filed: March 19, 2018
    Date of Patent: April 23, 2019
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yan-Zuo Tsai, Yang-Chih Hsueh, Chia-Yin Chen, Fu-Kang Tien, Ebin Liao, Wen-Chih Chiou
  • Patent number: 10032698
    Abstract: An interconnection structure and method disclosed for providing an interconnection structure that includes conductive features having reduced topographic variations. The interconnection structure includes a contact pad disposed over a substrate. The contact pad includes a first layer of a first conductive material and a second layer of a second conductive material over the first layer. The first conductive material and the second conductive material are made of substantially the same material and have a first average grain size and a second average grain size that is smaller than the first average grain size. The interconnection structure also includes a passivation layer covering the substrate and the contact pad, and the passivation layer has an opening exposing the contact pad.
    Type: Grant
    Filed: June 5, 2017
    Date of Patent: July 24, 2018
    Assignee: Taiwan Semiconductor Manufacturing Company
    Inventors: Hsiao Yun Lo, Yung-Chi Lin, Yang-Chih Hsueh, Tsang-Jiuh Wu, Wen-Chih Chiou
  • Patent number: 9901917
    Abstract: The present invention provides methods and designs of enclosed-channel reactor system for manufacturing catalysts or supports. Both of the configuration designs force the gaseous precursors and purge gas flow through the channel surface of reactor. The precursors will transform to thin film or particle catalysts or supports under adequate reaction temperature, working pressure and gas concentration. The reactor body is either sealed or enclosed for isolation from atmosphere. Another method using super ALD cycles is also proposed to grow alloy catalysts or supports with controllable concentration. The catalysts prepared by the method and system in the present invention are noble metals, such as platinum, palladium, rhodium, ruthenium, iridium and osmium, or transition metals such as iron, silver, cobalt, nickel and tin, while supports are silicon oxide, aluminum oxide, zirconium oxide, cerium oxide or magnesium oxide, or refractory metals, which can be chromium, molybdenum, tungsten or tantalum.
    Type: Grant
    Filed: May 17, 2016
    Date of Patent: February 27, 2018
    Assignee: NATIONAL APPLIED RESEARCH LABORATORIES
    Inventors: Chi-Chung Kei, Bo-Heng Liu, Chien-Pao Lin, Chien-Nan Hsiao, Yang-Chih Hsueh, Tsong-Pyng Perng
  • Publication number: 20170271242
    Abstract: An interconnection structure and method disclosed for providing an interconnection structure that includes conductive features having reduced topographic variations. The interconnection structure includes a contact pad disposed over a substrate. The contact pad includes a first layer of a first conductive material and a second layer of a second conductive material over the first layer. The first conductive material and the second conductive material are made of substantially the same material and have a first average grain size and a second average grain size that is smaller than the first average grain size. The interconnection structure also includes a passivation layer covering the substrate and the contact pad, and the passivation layer has an opening exposing the contact pad.
    Type: Application
    Filed: June 5, 2017
    Publication date: September 21, 2017
    Inventors: Hsiao Yun Lo, Yung-Chi Lin, Yang-Chih Hsueh, Tsang-Jiuh Wu, Wen-Chih Chiou
  • Patent number: 9673132
    Abstract: An interconnection structure and method disclosed for providing an interconnection structure that includes conductive features having reduced topographic variations. The interconnection structure includes a contact pad disposed over a substrate. The contact pad includes a first layer of a first conductive material and a second layer of a second conductive material over the first layer. The first conductive material and the second conductive material are made of substantially the same material and have a first average grain size and a second average grain size that is smaller than the first average grain size. The interconnection structure also includes a passivation layer covering the substrate and the contact pad, and the passivation layer has an opening exposing the contact pad.
    Type: Grant
    Filed: October 9, 2014
    Date of Patent: June 6, 2017
    Assignee: Taiwan Semiconductor Manufacting Company, Ltd.
    Inventors: Hsiao Yun Lo, Yung-Chi Lin, Yang-Chih Hsueh, Tsang-Jiuh Wu, Wen-Chih Chiou
  • Publication number: 20160256863
    Abstract: The present invention provides methods and designs of enclosed-channel reactor system for manufacturing catalysts or supports. Both of the configuration designs force the gaseous precursors and purge gas flow through the channel surface of reactor. The precursors will transform to thin film or particle catalysts or supports under adequate reaction temperature, working pressure and gas concentration. The reactor body is either sealed or enclosed for isolation from atmosphere. Another method using super ALD cycles is also proposed to grow alloy catalysts or supports with controllable concentration. The catalysts prepared by the method and system in the present invention are noble metals, such as platinum, palladium, rhodium, ruthenium, iridium and osmium, or transition metals such as iron, silver, cobalt, nickel and tin, while supports are silicon oxide, aluminum oxide, zirconium oxide, cerium oxide or magnesium oxide, or refractory metals, which can be chromium, molybdenum, tungsten or tantalum.
    Type: Application
    Filed: May 17, 2016
    Publication date: September 8, 2016
    Inventors: Chi-Chung Kei, Bo-Heng Liu, Chien-Pao Lin, Chien-Nan Hsiao, Yang-Chih Hsueh, Tsong-Pyng Perng
  • Patent number: 9381509
    Abstract: The present invention provides methods and designs of enclosed-channel reactor system for manufacturing catalysts or supports. Both of the configuration designs force the gaseous precursors and purge gas flow through the channel surface of reactor. The precursors will transform to thin film or particle catalysts or supports under adequate reaction temperature, working pressure and gas concentration. The reactor body is either sealed or enclosed for isolation from atmosphere. Another method using super ALD cycles is also proposed to grow alloy catalysts or supports with controllable concentration. The catalysts prepared by the method and system in the present invention are noble metals, such as platinum, palladium, rhodium, ruthenium, iridium and osmium, or transition metals such as iron, silver, cobalt, nickel and tin, while supports are silicon oxide, aluminum oxide, zirconium oxide, cerium oxide or magnesium oxide, or refractory metals, which can be chromium, molybdenum, tungsten or tantalum.
    Type: Grant
    Filed: July 23, 2013
    Date of Patent: July 5, 2016
    Assignee: NATIONAL APPLIED RESEARCH LABORATORIES
    Inventors: Chi-Chung Kei, Bo-Heng Liu, Chien-Pao Lin, Chien-Nan Hsiao, Yang-Chih Hsueh, Tsong-Pyng Perng
  • Publication number: 20150054174
    Abstract: An interconnection structure and method disclosed for providing an interconnection structure that includes conductive features having reduced topographic variations. The interconnection structure includes a contact pad disposed over a substrate. The contact pad includes a first layer of a first conductive material and a second layer of a second conductive material over the first layer. The first conductive material and the second conductive material are made of substantially the same material and have a first average grain size and a second average grain size that is smaller than the first average grain size. The interconnection structure also includes a passivation layer covering the substrate and the contact pad, and the passivation layer has an opening exposing the contact pad.
    Type: Application
    Filed: October 9, 2014
    Publication date: February 26, 2015
    Inventors: Hsiao Yun Lo, Yung-Chi Lin, Yang-Chih Hsueh, Tsang-Jiuh Wu, Wen-Chih Chiou
  • Publication number: 20140140904
    Abstract: The present invention provides methods and designs of enclosed-channel reactor system for manufacturing catalysts or supports. Both of the configuration designs force the gaseous precursors and purge gas flow through the channel surface of reactor. The precursors will transform to thin film or particle catalysts or supports under adequate reaction temperature, working pressure and gas concentration. The reactor body is either sealed or enclosed for isolation from atmosphere. Another method using super ALD cycles is also proposed to grow alloy catalysts or supports with controllable concentration. The catalysts prepared by the method and system in the present invention are noble metals, such as platinum, palladium, rhodium, ruthenium, iridium and osmium, or transition metals such as iron, silver, cobalt, nickel and tin, while supports are silicon oxide, aluminum oxide, zirconium oxide, cerium oxide or magnesium oxide, or refractory metals, which can be chromium, molybdenum, tungsten or tantalum.
    Type: Application
    Filed: July 23, 2013
    Publication date: May 22, 2014
    Applicant: National Applied Research Laboratories
    Inventors: Chi-Chung Kei, Bo-Heng Liu, Chien-Pao Lin, Chien-Nan Hsiao, Yang-Chih Hsueh, Tsong-Pyng Perng