Patents by Inventor Yang-Chun LEE
Yang-Chun LEE has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11776444Abstract: A pixel array substrate, including scanning line pads, data line pads, scanning lines, data lines, gate transmission lines, pixels, a data line signal chip, and a scanning line signal chip, is provided. The scanning lines extend along a first direction. The data lines and the gate transmission lines extend along a second direction. The data lines are electrically connected to the data line pads. The scanning lines are electrically connected to the scanning line pads through the gate transmission lines. A ratio of a number of rows of pixels arranged in the first direction to a number of rows of pixels arranged in the second direction is X:Y. Each pixel includes m sub-pixels.Type: GrantFiled: November 8, 2021Date of Patent: October 3, 2023Assignee: Au Optronics CorporationInventors: Yang-Chun Lee, Sheng-Yen Cheng, Yueh-Hung Chung, Min-Tse Lee, Kuang-Hsiang Liao, Shiang-Lin Lian, Yan-Kai Wang, Ya-Ling Hsu, Chen-Hsien Liao
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Patent number: 11320710Abstract: A pixel array substrate including a substrate, data lines, gate lines, pixels, and transfer lines is provided. The data lines are disposed on the substrate and arranged in a first direction. The gate lines are disposed on the substrate and arranged in a second direction interlaced with the first direction. The pixels are disposed on the substrate, each of which includes an active device electrically connected to one of the data lines and one of the gate lines and a pixel electrode electrically connected to the active device. The transfer lines are arranged in the first direction and electrically connected to the gate lines, respectively. The pixels include first pixels. In a top view of the pixel array substrate, at least one of the pixel electrodes of the first pixels is partially overlapped with one of the transfer lines. A driving method of a pixel array substrate is also provided.Type: GrantFiled: October 29, 2020Date of Patent: May 3, 2022Assignee: Au Optronics CorporationInventors: Min-Tse Lee, Sheng-Yen Cheng, Yueh-Hung Chung, Kuang-Hsiang Liao, Yang-Chun Lee, Yan-Kai Wang, Ya-Ling Hsu, Yi-Ren Chen, Hung-Che Lin, Sheng-Ju Ho, Chien-Huang Liao, Chen-Hsien Liao
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Publication number: 20220068182Abstract: A pixel array substrate, including scanning line pads, data line pads, scanning lines, data lines, gate transmission lines, pixels, a data line signal chip, and a scanning line signal chip, is provided. The scanning lines extend along a first direction. The data lines and the gate transmission lines extend along a second direction. The data lines are electrically connected to the data line pads. The scanning lines are electrically connected to the scanning line pads through the gate transmission lines. A ratio of a number of rows of pixels arranged in the first direction to a number of rows of pixels arranged in the second direction is X:Y. Each pixel includes m sub-pixels.Type: ApplicationFiled: November 8, 2021Publication date: March 3, 2022Applicant: Au Optronics CorporationInventors: Yang-Chun Lee, Sheng-Yen Cheng, Yueh-Hung Chung, Min-Tse Lee, Kuang-Hsiang Liao, Shiang-Lin Lian, Yan-Kai Wang, Ya-Ling Hsu, Chen-Hsien Liao
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Patent number: 11200826Abstract: A pixel array substrate, including scanning line pads, data line pads, scanning lines, data lines, gate transmission lines, pixels, a data line signal chip, and a scanning line signal chip, is provided. The scanning lines extend along a first direction. The data lines and the gate transmission lines extend along a second direction. The data lines are electrically connected to the data line pads. The scanning lines are electrically connected to the scanning line pads through the gate transmission lines. A ratio of a number of rows of pixels arranged in the first direction to a number of rows of pixels arranged in the second direction is X:Y. Each pixel includes m sub-pixels.Type: GrantFiled: August 6, 2020Date of Patent: December 14, 2021Assignee: Au Optronics CorporationInventors: Yang-Chun Lee, Sheng-Yen Cheng, Yueh-Hung Chung, Min-Tse Lee, Kuang-Hsiang Liao, Shiang-Lin Lian, Yan-Kai Wang, Ya-Ling Hsu, Chen-Hsien Liao
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Patent number: 11194205Abstract: A pixel array substrate including a substrate, data lines, gate lines, pixels, and transfer lines is provided. The data lines are disposed on the substrate and arranged in a first direction. The gate lines are disposed on the substrate and arranged in a second direction interlaced with the first direction. The pixels are disposed on the substrate, each of which includes an active device electrically connected to one of the data lines and one of the gate lines and a pixel electrode electrically connected to the active device. The transfer lines are arranged in the first direction and electrically connected to the gate lines, respectively. The pixels include first pixels. In a top view of the pixel array substrate, at least one of the pixel electrodes of the first pixels is partially overlapped with one of the transfer lines. A driving method of a pixel array substrate is also provided.Type: GrantFiled: October 29, 2020Date of Patent: December 7, 2021Assignee: Au Optronics CorporationInventors: Min-Tse Lee, Sheng-Yen Cheng, Yueh-Hung Chung, Kuang-Hsiang Liao, Yang-Chun Lee, Yan-Kai Wang, Ya-Ling Hsu, Yi-Ren Chen, Hung-Che Lin, Sheng-Ju Ho, Chien-Huang Liao, Chen-Hsien Liao
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Patent number: 11126050Abstract: A pixel array substrate including a substrate, data lines, gate lines, pixels, and transfer lines is provided. The data lines are disposed on the substrate and arranged in a first direction. The gate lines are disposed on the substrate and arranged in a second direction interlaced with the first direction. The pixels are disposed on the substrate, each of which includes an active device electrically connected to one of the data lines and one of the gate lines and a pixel electrode electrically connected to the active device. The transfer lines are arranged in the first direction and electrically connected to the gate lines, respectively. The pixels include first pixels. In a top view of the pixel array substrate, at least one of the pixel electrodes of the first pixels is partially overlapped with one of the transfer lines. A driving method of a pixel array substrate is also provided.Type: GrantFiled: October 29, 2020Date of Patent: September 21, 2021Assignee: Au Optronics CorporationInventors: Min-Tse Lee, Sheng-Yen Cheng, Yueh-Hung Chung, Kuang-Hsiang Liao, Yang-Chun Lee, Yan-Kai Wang, Ya-Ling Hsu, Yi-Ren Chen, Hung-Che Lin, Sheng-Ju Ho, Chien-Huang Liao, Chen-Hsien Liao
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Patent number: 11126051Abstract: A pixel array substrate including a substrate, data lines, gate lines, pixels, and transfer lines is provided. The data lines are disposed on the substrate and arranged in a first direction. The gate lines are disposed on the substrate and arranged in a second direction interlaced with the first direction. The pixels are disposed on the substrate, each of which includes an active device electrically connected to one of the data lines and one of the gate lines and a pixel electrode electrically connected to the active device. The transfer lines are arranged in the first direction and electrically connected to the gate lines, respectively. The pixels include first pixels. In a top view of the pixel array substrate, at least one of the pixel electrodes of the first pixels is partially overlapped with one of the transfer lines. A driving method of a pixel array substrate is also provided.Type: GrantFiled: October 29, 2020Date of Patent: September 21, 2021Assignee: Au Optronics CorporationInventors: Min-Tse Lee, Sheng-Yen Cheng, Yueh-Hung Chung, Kuang-Hsiang Liao, Yang-Chun Lee, Yan-Kai Wang, Ya-Ling Hsu, Yi-Ren Chen, Hung-Che Lin, Sheng-Ju Ho, Chien-Huang Liao, Chen-Hsien Liao
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Publication number: 20210056882Abstract: A pixel array substrate, including scanning line pads, data line pads, scanning lines, data lines, gate transmission lines, pixels, a data line signal chip, and a scanning line signal chip, is provided. The scanning lines extend along a first direction. The data lines and the gate transmission lines extend along a second direction. The data lines are electrically connected to the data line pads. The scanning lines are electrically connected to the scanning line pads through the gate transmission lines. A ratio of a number of rows of pixels arranged in the first direction to a number of rows of pixels arranged in the second direction is X:Y. Each pixel includes m sub-pixels.Type: ApplicationFiled: August 6, 2020Publication date: February 25, 2021Applicant: Au Optronics CorporationInventors: Yang-Chun Lee, Sheng-Yen Cheng, Yueh-Hung Chung, Min-Tse Lee, Kuang-Hsiang Liao, Shiang-Lin Lian, Yan-Kai Wang, Ya-Ling Hsu, Chen-Hsien Liao
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Publication number: 20210041754Abstract: A pixel array substrate including a substrate, data lines, gate lines, pixels, and transfer lines is provided. The data lines are disposed on the substrate and arranged in a first direction. The gate lines are disposed on the substrate and arranged in a second direction interlaced with the first direction. The pixels are disposed on the substrate, each of which includes an active device electrically connected to one of the data lines and one of the gate lines and a pixel electrode electrically connected to the active device. The transfer lines are arranged in the first direction and electrically connected to the gate lines, respectively. The pixels include first pixels. In a top view of the pixel array substrate, at least one of the pixel electrodes of the first pixels is partially overlapped with one of the transfer lines. A driving method of a pixel array substrate is also provided.Type: ApplicationFiled: October 29, 2020Publication date: February 11, 2021Applicant: Au Optronics CorporationInventors: Min-Tse Lee, Sheng-Yen Cheng, Yueh-Hung Chung, Kuang-Hsiang Liao, Yang-Chun Lee, Yan-Kai Wang, Ya-Ling Hsu, Yi-Ren Chen, Hung-Che Lin, Sheng-Ju Ho, Chien-Huang Liao, Chen-Hsien Liao
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Publication number: 20210041753Abstract: A pixel array substrate including a substrate, data lines, gate lines, pixels, and transfer lines is provided. The data lines are disposed on the substrate and arranged in a first direction. The gate lines are disposed on the substrate and arranged in a second direction interlaced with the first direction. The pixels are disposed on the substrate, each of which includes an active device electrically connected to one of the data lines and one of the gate lines and a pixel electrode electrically connected to the active device. The transfer lines are arranged in the first direction and electrically connected to the gate lines, respectively. The pixels include first pixels. In a top view of the pixel array substrate, at least one of the pixel electrodes of the first pixels is partially overlapped with one of the transfer lines. A driving method of a pixel array substrate is also provided.Type: ApplicationFiled: October 29, 2020Publication date: February 11, 2021Applicant: Au Optronics CorporationInventors: Min-Tse Lee, Sheng-Yen Cheng, Yueh-Hung Chung, Kuang-Hsiang Liao, Yang-Chun Lee, Yan-Kai Wang, Ya-Ling Hsu, Yi-Ren Chen, Hung-Che Lin, Sheng-Ju Ho, Chien-Huang Liao, Chen-Hsien Liao
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Publication number: 20210041755Abstract: A pixel array substrate including a substrate, data lines, gate lines, pixels, and transfer lines is provided. The data lines are disposed on the substrate and arranged in a first direction. The gate lines are disposed on the substrate and arranged in a second direction interlaced with the first direction. The pixels are disposed on the substrate, each of which includes an active device electrically connected to one of the data lines and one of the gate lines and a pixel electrode electrically connected to the active device. The transfer lines are arranged in the first direction and electrically connected to the gate lines, respectively. The pixels include first pixels. In a top view of the pixel array substrate, at least one of the pixel electrodes of the first pixels is partially overlapped with one of the transfer lines. A driving method of a pixel array substrate is also provided.Type: ApplicationFiled: October 29, 2020Publication date: February 11, 2021Applicant: Au Optronics CorporationInventors: Min-Tse Lee, Sheng-Yen Cheng, Yueh-Hung Chung, Kuang-Hsiang Liao, Yang-Chun Lee, Yan-Kai Wang, Ya-Ling Hsu, Yi-Ren Chen, Hung-Che Lin, Sheng-Ju Ho, Chien-Huang Liao, Chen-Hsien Liao
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Publication number: 20210041756Abstract: A pixel array substrate including a substrate, data lines, gate lines, pixels, and transfer lines is provided. The data lines are disposed on the substrate and arranged in a first direction. The gate lines are disposed on the substrate and arranged in a second direction interlaced with the first direction. The pixels are disposed on the substrate, each of which includes an active device electrically connected to one of the data lines and one of the gate lines and a pixel electrode electrically connected to the active device. The transfer lines are arranged in the first direction and electrically connected to the gate lines, respectively. The pixels include first pixels. In a top view of the pixel array substrate, at least one of the pixel electrodes of the first pixels is partially overlapped with one of the transfer lines. A driving method of a pixel array substrate is also provided.Type: ApplicationFiled: October 29, 2020Publication date: February 11, 2021Applicant: Au Optronics CorporationInventors: Min-Tse Lee, Sheng-Yen Cheng, Yueh-Hung Chung, Kuang-Hsiang Liao, Yang-Chun Lee, Yan-Kai Wang, Ya-Ling Hsu, Yi-Ren Chen, Hung-Che Lin, Sheng-Ju Ho, Chien-Huang Liao, Chen-Hsien Liao
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Patent number: 10852609Abstract: A pixel array substrate including a substrate, data lines, gate lines, pixels, and transfer lines is provided. The data lines are disposed on the substrate and arranged in a first direction. The gate lines are disposed on the substrate and arranged in a second direction interlaced with the first direction. The pixels are disposed on the substrate, each of which includes an active device electrically connected to one of the data lines and one of the gate lines and a pixel electrode electrically connected to the active device. The transfer lines are arranged in the first direction and electrically connected to the gate lines, respectively. The pixels include first pixels. In a top view of the pixel array substrate, at least one of the pixel electrodes of the first pixels is partially overlapped with one of the transfer lines. A driving method of a pixel array substrate is also provided.Type: GrantFiled: February 18, 2020Date of Patent: December 1, 2020Assignee: Au Optronics CorporationInventors: Min-Tse Lee, Sheng-Yen Cheng, Yueh-Hung Chung, Kuang-Hsiang Liao, Yang-Chun Lee, Yan-Kai Wang, Ya-Ling Hsu, Yi-Ren Chen, Hung-Che Lin, Sheng-Ju Ho, Chien-Huang Liao, Chen-Hsien Liao
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Publication number: 20200272010Abstract: A pixel array substrate including a substrate, data lines, gate lines, pixels, and transfer lines is provided. The data lines are disposed on the substrate and arranged in a first direction. The gate lines are disposed on the substrate and arranged in a second direction interlaced with the first direction. The pixels are disposed on the substrate, each of which includes an active device electrically connected to one of the data lines and one of the gate lines and a pixel electrode electrically connected to the active device. The transfer lines are arranged in the first direction and electrically connected to the gate lines, respectively. The pixels include first pixels. In a top view of the pixel array substrate, at least one of the pixel electrodes of the first pixels is partially overlapped with one of the transfer lines. A driving method of a pixel array substrate is also provided.Type: ApplicationFiled: February 18, 2020Publication date: August 27, 2020Applicant: Au Optronics CorporationInventors: Min-Tse Lee, Sheng-Yen Cheng, Yueh-Hung Chung, Kuang-Hsiang Liao, Yang-Chun Lee, Yan-Kai Wang, Ya-Ling Hsu, Yi-Ren Chen, Hung-Che Lin, Sheng-Ju Ho, Chien-Huang Liao, Chen-Hsien Liao
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Patent number: 8928024Abstract: The present invention provides an optical device, and the optical device comprises a luminous element and a gradient-index nanoparticle layer and scattering particles composed by particles stack with different refractive indexes and particle sizes. The luminous element has a light emitting surface. The refractive indexes of the nanoparticle layers decrease bottom up. The nanoparticles based gradient-index nanoparticle layer comprises a plurality of dielectric layers with different refractive index, and the dielectric scattering particle layers are stacked upward from the light emitting surface to let the gradient-index nanoparticle layer and scattering particles cover the light emitting surface. The method for manufacturing the abovementioned optical device is also disclosed.Type: GrantFiled: October 8, 2013Date of Patent: January 6, 2015Assignee: National Taiwan UniversityInventors: Hsuen-Li Chen, Cheng-Yi Fang, Yang-Chun Lee, Yu-Lun Liu, De-Hui Wan, Chen-Chieh Yu
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Publication number: 20140306252Abstract: The present invention provides an optical device, and the optical device comprises a luminous element and a gradient-index nanoparticle layer and scattering particles composed by particles stack with different refractive indexes and particle sizes. The luminous element has a light emitting surface. The refractive indexes of the nanoparticle layers decrease bottom up. The nanoparticles based gradient-index nanoparticle layer comprises a plurality of dielectric layers with different refractive index, and the dielectric scattering particle layers are stacked upward from the light emitting surface to let the gradient-index nanoparticle layer and scattering particles cover the light emitting surface. The method for manufacturing the abovementioned optical device is also disclosed.Type: ApplicationFiled: October 8, 2013Publication date: October 16, 2014Applicant: NATIONAL TAIWAN UNIVERSITYInventors: Hsuen-Li CHEN, Cheng-Yi FANG, Yang-Chun LEE, Yu-Lun LIU, De-Hui WAN, Chen-Chieh YU