Abstract: A clip pushing structure for a clip applier, which is used to install and push clips. The clip pushing structure comprises: a nail mounting groove piece which has a receiving slot, wherein the clips are placed in the receiving slot of the nail mounting groove piece in a continuous abutting manner; a screw-in ladder member which has a nail-pushing part and a plurality of pushed parts, a pitch being formed between every two pushed parts; a nail pushing member which has a body, a front pushing part that may push the foremost clip, and a rear pushing part that may push each pushed part of the screw-in ladder member; and a clamping jaw which penetrates a clamping jaw assembly, the clamping jaw having two arms which each have a convex part and abut against a left side wall and a right side wall of the clamping jaw assembly.

Abstract: Racks and cabinets for housing information technology equipment are disclosed. In these racks and cabinets, a number of upright members are connected to cross-members to define a rectilinear frame. Mounting rails are coupled directly or indirectly to the upright members to carry the equipment. Each of the upright members defines an interior compartment along its length with an opening that spans at least a majority of the width of the upright member. In many embodiments, the width of the opening will span 70%, 80%, or more of the width of the upright member. The interior compartments of the upright members are configured as cable raceways and spaces for storing support equipment.

Abstract: An operating structure of a surgical clip applier is provided to drive a clip clamping unit. The operating structure of the surgical clip applier comprises: a body; a front driving element for driving the clip clamping unit; a restoring spring for driving the front driving element to move backward; a press-control element pivotally connected to the body; a front driving arm pivotally connected to the press-control element; and a lower driving arm with two ends pivotally connected to the body and the front driving arm, respectively, to drive the front driving element to move forward.

Abstract: An operating structure of a surgical clip applier is provided to drive a clip clamping unit. The operating structure of the surgical clip applier comprises: a body; a front driving element for driving the clip clamping unit; a restoring spring for driving the front driving element to move backward; a press-control element pivotally connected to the body; a front driving arm pivotally connected to the press-control element; and a lower driving arm with two ends pivotally connected to the body and the front driving arm, respectively, to drive the front driving element to move forward.

Abstract: The computer processor identifies a first shared set of input ports that are common to a first hardware model and a second hardware model and a second shared set of input ports that are common to a first reference model and a second reference model. The computer processor selects logic of the first hardware model and logic of the second hardware model that are each traceable to the first shared set of input ports and selects logic of the first reference model and logic of the second reference model that are each traceable to the second shared set of input ports. The computer processor determines that the logic of the second hardware model and the logic of the second reference model have verified logic by determining that the logic of the first hardware model is equivalent to the logic of the second hardware model and the logic of the first reference model is equivalent to the logic of the second reference model.

Abstract: A computer-implemented for reducing memory requirements for a user interface method includes generating, by one or more processors, a first matrix of symbols with columns that correspond to reels of cyclical symbols. The reels are configured to be rendered in adjacent sections of a display. The method further includes rotating, by one or more processors, each reel by a random amount responsive to receiving a spinning instruction. The method includes configuring a first reel to occupy both a first section of the display associated with the first reel and a second section of the display associated with an adjacent reel so that the adjacent reel will not be rendered when a pattern of symbols of the rendered reels is determined to correspond to a particular pattern. Data that represents the symbols of the reels is maintained in a shadow matrix stored in memory.

Abstract: Disclosed aspects relate to accelerator sharing among a plurality of processors through a plurality of coherent proxies. The cache lines in a cache associated with the accelerator are allocated to one of the plurality of coherent proxies. In a cache directory for the cache lines used by the accelerator, the status of the cache lines and the identification information of the coherent proxies to which the cache lines are allocated are provided. Each coherent proxy maintains a shadow directory of the cache directory for the cache lines allocated to it. In response to receiving an operation request, a coherent proxy corresponding to the request is determined. The accelerator communicates with the determined coherent proxy for the request.

Abstract: A symmetrical multi-processing (SMP) node, a distributed SMP (DSMP) system comprising a plurality of SMP nodes, and a method implemented in the SMP node are disclosed. The SMP node comprises: a plurality of processors, a memory coupled to the plurality of processors, and a memory coherent proxy coupled to the plurality of processors through a coherent accelerator interface. The memory coherent proxy is configured to manage statuses of cache lines in the memory.

Abstract: The present application discloses a metering system for calculating a real-time profit or loss of a gas station, including a metering module, a level gauge of the oil tank, and a communication management machine with a built-in data processing module; the metering module and the level gauge are respectively communicated with the communication management machine; the oil tank, an oil pipeline of the oil tank and an oil inlet of the fuel dispenser are respectively provided with a sensor array module for collecting density data of the oil therein; the sensor array module includes a plurality of oil density sensors; the sensor array modules are communicated with the communication management machine; the built-in data processing module receives and processes data from the metering module, the level gauge and the sensor array modules respectively.

Abstract: The present application discloses a metering system for calculating a real-time profit or loss of a gas station, including a metering module, a level gauge of the oil tank, and a communication management machine with a built-in data processing module; the metering module and the level gauge are respectively communicated with the communication management machine; the oil tank, an oil pipeline of the oil tank and an oil inlet of the fuel dispenser are respectively provided with a sensor array module for collecting density data of the oil therein; the sensor array module includes a plurality of oil density sensors; the sensor array modules are communicated with the communication management machine; the built-in data processing module receives and processes data from the metering module, the level gauge and the sensor array modules respectively.

Abstract: A electrical switch has a first substrate, a first conducting layer disposed on the first substrate, a first dielectric layer disposed on the first conducting layer and a second conducting layer disposed on the first dielectric layer, and the second conducting layer disposed on the second substrate, and a conductive via connected to the first conducting layer and extending through the first dielectric layer. Active dielectric has a first conductor, a first dielectric layer disposed on the first conducting layer, one or more electrical switches disposed on the first dielectric layer, a dielectric layer disposed between neighboring electrical switches, the second dielectric layer disposed on the last electrical switch, and the second conducting layer disposed on the second dielectric layer.

Abstract: An apparatus for verification includes a processing module, a data collection module, an engine selection module and an engine execution module. The processing module processes a netlist using a plurality of engines. The netlist includes components and nodes of an integrated circuit design. Each engine includes an algorithm for verification of the integrated circuit design. The data collection module stores, for each engine, execution results for the engine for a plurality of netlists, the results stored in a history buffer. The engine selection module, for a current netlist, calculates using execution results in the history buffer which engine of the plurality of engines has a highest predicted performance and selects the engine with the highest predicted performance. The engine execution module executes the current netlist using the selected engine to produce execution results, reports the execution results and stores the execution results in the history buffer.

Abstract: Efficient codeword synchronization methods and systems for fiber channel protocol are disclosed. The method includes identifying a codeword boundary by detecting 100-bit known patterns in a bit codeword in a transmission.

Abstract: An apparatus for model splitting includes an extraction module that extracts netlist parameters from a static netlist. The netlist parameters include node parameters of each node of the static netlist. The node parameters include node connection information and execution cycle information. The nodes of the static netlist include nodes of an integrated circuit design from an input to an output. A split node module analyzes, using the netlist parameters, each node in a cycle and determines if each node is a potential split node, which is a node with a projected sub-proof execution time less than a time limit. A split chain module determines if a split chain exists. The split chain includes a connection between potential split nodes from the input to the output at each execution cycle. A reporting module reports nodes of a split chain in response to determining that a split chain exists.

Abstract: The computer processor identifies a first shared set of input ports that are common to a first hardware model and a second hardware model and a second shared set of input ports that are common to a first reference model and a second reference model. The computer processor selects logic of the first hardware model and logic of the second hardware modelt that are each traceable to the first shared set of input ports and selects logic of the first reference model and logic of the second reference model that are each traceable to the second shared set of input ports. The computer processor determines that the logic of the second hardware model and the logic of the second reference model have verified logic by determining that the logic of the first hardware model is equivalent to the logic of the second hardware model and the logic of the first reference model is equivalent to the logic of the second reference model.

Abstract: A symmetrical multi-processing (SMP) node, a distributed SMP (DSMP) system comprising a plurality of SMP nodes, and a method implemented in the SMP node are disclosed. The SMP node comprises: a plurality of processors, a memory coupled to the plurality of processors, and a memory coherent proxy coupled to the plurality of processors through a coherent accelerator interface. The memory coherent proxy is configured to manage statuses of cache lines in the memory.

Abstract: Efficient codeword synchronization methods and systems for fiber channel protocol are disclosed. The method includes identifying a codeword boundary by detecting 100-bit known patterns in a bit codeword in a transmission.

Abstract: An apparatus for verification includes a processing module, a data collection module, an engine selection module and an engine execution module. The processing module processes a netlist using a plurality of engines. The netlist includes components and nodes of an integrated circuit design. Each engine includes an algorithm for verification of the integrated circuit design. The data collection module stores, for each engine, execution results for the engine for a plurality of netlists, the results stored in a history buffer. The engine selection module, for a current netlist, calculates using execution results in the history buffer which engine of the plurality of engines has a highest predicted performance and selects the engine with the highest predicted performance. The engine execution module executes the current netlist using the selected engine to produce execution results, reports the execution results and stores the execution results in the history buffer.

Abstract: An apparatus for model splitting includes an extraction module that extracts netlist parameters from a static netlist. The netlist parameters include node parameters of each node of the static netlist. The node parameters include node connection information and execution cycle information. The nodes of the static netlist include nodes of an integrated circuit design from an input to an output. A split node module analyzes, using the netlist parameters, each node in a cycle and determines if each node is a potential split node, which is a node with a projected sub-proof execution time less than a time limit. A split chain module determines if a split chain exists. The split chain includes a connection between potential split nodes from the input to the output at each execution cycle. A reporting module reports nodes of a split chain in response to determining that a split chain exists.

Abstract: A microstrip antenna includes a dielectric substrate, a radiating plate, and a single feed connection. In these instances, the rectangular radiating plate is affixed to the dielectric substrate and having a center point, and the radiating patch defines a first aperture and a second aperture on opposite sides of the center point, each aperture having a center longitudinally aligned with the center point. The single feed connection is laterally offset from a point on a virtual line, wherein the virtual line is located between two opposite corners of the rectangular radiating patch and passes through the center point.