Patents by Inventor Yang Lee

Yang Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250148066
    Abstract: The present disclosure generally relates to methods and user interfaces for authentication, including providing authentication at a computer system in accordance with some embodiments.
    Type: Application
    Filed: September 26, 2024
    Publication date: May 8, 2025
    Inventors: Sung Chang LEE, Bowen CHENG, Yue HANG, Weiqi PAN, Yue SHEN, Xiaoguang YANG, Xiaofeng YU, Feng ZHANG, Liang ZHAO, Qiuji ZHAO, Wendong ZHONG
  • Patent number: 12292687
    Abstract: In a method of pattern formation information including a pattern size on a reticle is received. A width of an EUV radiation beam is adjusted in accordance with the information. The EUV radiation beam is scanned on the reticle. A photo resist layer is exposed with a reflected EUV radiation beam from the reticle. An increase of intensity per unit area of the EUV radiation beam on the reticle after the adjusting the width is greater when the width before adjustment is W1 compared to an increase of intensity per unit area of the EUV radiation beam on the reticle after the adjusting the width when the width before adjustment is W2 when W1>W2.
    Type: Grant
    Filed: July 25, 2023
    Date of Patent: May 6, 2025
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chi Yang, Tsung-Hsun Lee, Jian-Yuan Su, Ching-Juinn Huang, Po-Chung Cheng
  • Patent number: 12294153
    Abstract: An array antenna includes a flexible substrate formed by stacked liquid crystal polymer (LCP) layers and has at least one feed point. At least one serial antenna is arranged on the flexible substrate, and a microstrip is extended from the feed point to connect a plurality of radiating elements in series to form the serial antenna. The tail end one of the radiating elements of the serial antenna is connected to one end of a ground microstrip, and another end of the ground microstrip is short-circuited to the ground. The length of the ground microstrip is approximately one fourth of the wavelength of the center frequency of the array antenna. Feeding sections where microstrips feeding to the radiating elements are in a horn and/or groove shape. Desired frequency and bandwidth may be obtained by adjusting lengths and widths of feeding sections respectively.
    Type: Grant
    Filed: October 24, 2022
    Date of Patent: May 6, 2025
    Assignee: QUANTUMZ INC.
    Inventors: Chih-Yang Lou, Meng-Hua Tsai, Wei-Ting Lee, Sin-Siang Wang
  • Patent number: 12294362
    Abstract: An analog input device including at least one mounting panel and a matrix of analog push button assemblies mounted thereon. Each analog push button assembly including an analog pressure sensor including a pressure reception arrangement having an optical sensing sub-arrangement configured to measure an amount of light varied according to a pressure sensed at the pressure reception arrangement and an output terminal for outputting an analog signal corresponding to the amount of light measured, and a plunger element configured to exert the pressure on the pressure reception arrangement. The analog input device may include a multiplexer including an input side coupled to the push button assemblies and an output side; an analog-to-digital converter coupled to the output side of the multiplexer; a processor coupled to the analog-to-digital converter and configured to output a data packet; and a communication interface configured to transmit the data packet to a host computing device.
    Type: Grant
    Filed: October 12, 2023
    Date of Patent: May 6, 2025
    Assignee: Razer (Asia-Pacific) Pte. Ltd.
    Inventors: Chung Wei Lee, Thuan Teck Tan, Wenliang Yang, Alvin Sim, Kok Kiong Low
  • Patent number: 12288526
    Abstract: An electronic device including a display panel, a scan driving circuit, and a data driving circuit. The display panel includes a plurality of scan lines, a plurality of data lines, and a plurality of pixels. The scan driving circuit is configured to apply a scan signal to the scan lines. The data driving circuit is configured to apply a data signal to the data lines. The scan lines extend in a first direction. The scan driving circuit and the data driving circuit are arranged in the first direction.
    Type: Grant
    Filed: January 8, 2023
    Date of Patent: April 29, 2025
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Sunho Kim, Gun Hee Kim, Taehoon Yang, Sun Hee Lee, Sungjin Hong
  • Patent number: 12287870
    Abstract: The present invention relates to a security policy and audit log two-way inquiry, collation, and tracking system and method capable of effectively inquiring and confirming various pieces of log information generated due to setting and change of various security policies, and capable of inquiring and confirming a security policy related to log information based on the collected log information. According to the present invention, it is possible to inquire, collate, and track logs generated and recorded by the various security policies, it is possible to inquire, collate, and track the security policy applied to the collected log, and it is possible to inquire, collate, and track the security policy and the log in two ways and in real time.
    Type: Grant
    Filed: March 21, 2019
    Date of Patent: April 29, 2025
    Assignee: SECUVE.CO., LTD.
    Inventors: Ki Yoong Hong, Kyu Ho Lee, Sung Geun Lee, Joo Yang Son, Jong Man Song
  • Publication number: 20250133865
    Abstract: Wafer level solder ball bridge formation is used to provide electrical and thermal coupling between bond pads formed on substrates and bond pads formed on devices mounted on substrates. Solder balls anchored to solder-wettable bond pads enable sequential linking of laterally coupled solder balls over non-solder-wettable surface in the formation of solder ball bridge assemblies. Solder ball bridges formed between a device disposed on a substrate and a substrate enables thermal energy transfer and electrical interconnection between the device and the substrate.
    Type: Application
    Filed: October 17, 2024
    Publication date: April 24, 2025
    Inventors: SURESH VENKATESAN, SIMON BOOTHROYD, JING YANG, LUCAS SOLDANO, YONG MENG LEE
  • Publication number: 20250132366
    Abstract: The present invention provides a solid oxide fuel cell including a fuel electrode support including Ni-YSZ; a functional layer positioned on the fuel electrode support; an electrolyte layer positioned on the functional layer; an interlayer positioned on the electrolyte layer; and an air electrode layer positioned on the interlayer, wherein the functional layer includes gadolinium-doped ceria (GDC) nanoparticles dispersed.
    Type: Application
    Filed: January 17, 2024
    Publication date: April 24, 2025
    Inventors: Kyung Joong Yoon, Haewon Seo, Sungeun Yang, Deok-Hwang Kwon, Ho Il Ji, Hye Jung Chang, Hyoungchul Kim, Ji-Won Son, Jong Ho Lee
  • Patent number: 12281836
    Abstract: A refrigerator including: a main body forming a storage compartment and a door provided to open and close the storage compartment, wherein the door includes a door frame, a cover arranged in front of the door frame and including a cover fixer, and a door panel arranged in front of the cover, the door panel including a first fixer and a second fixer on a rear surface of the door panel. When the door panel is coupled to a front side of the cover, the first fixer is coupled to the door frame and the second fixer is coupled to the cover.
    Type: Grant
    Filed: August 11, 2023
    Date of Patent: April 22, 2025
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Chomin Lee, Byoungmok Kim, Oungu Lee, Jeonghyun Lee, Dongyeong Kim, Minseok Choi, Yang-yeol Gu, Ae-ryun Kim, Yountae Shin, Donghyun Lee, Seonju Lee, Jaemin Lee
  • Patent number: 12284812
    Abstract: A semiconductor structure includes a substrate, a first dielectric layer on the substrate, a plurality of memory stack structures on the first dielectric layer, an insulating layer conformally covering the memory stack structures and the first dielectric layer, a second dielectric layer on the insulating layer and filling the spaces between the memory stack structures, a first interconnecting structure through the second dielectric layer, wherein a top surface of the first interconnecting structure is flush with a top surface of the second dielectric layer and higher than top surfaces of the memory stack structures, a third dielectric layer on the second dielectric layer, and a plurality of second interconnecting structures through the third dielectric layer, the second dielectric layer and the insulating layer on the top surfaces of the memory stack structures to contact the top surfaces of the memory stack structures.
    Type: Grant
    Filed: April 16, 2024
    Date of Patent: April 22, 2025
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Hui-Lin Wang, Yu-Ping Wang, Chen-Yi Weng, Chin-Yang Hsieh, Yi-Hui Lee, Ying-Cheng Liu, Yi-An Shih, I-Ming Tseng, Jing-Yin Jhang, Chien-Ting Lin
  • Publication number: 20250122306
    Abstract: The present disclosure relates to antibodies and antibody conjugates that selectively bind to tissue factor and its isoforms and homologs, and compositions comprising the antibodies. Also provided are methods of using the antibodies and antibody conjugates, such as therapeutic and diagnostic methods.
    Type: Application
    Filed: October 11, 2024
    Publication date: April 17, 2025
    Inventors: Grace Jungeun LEE, Amandeep Kaur GAKHAL, Daniel CALARESE, Junhao YANG, Krishna BAJJURI, Xiaofan LI, Sihong ZHOU, Helena KIEFEL, Robert Tian-Xuan YUAN, Andrew James MCGEEHAN, Miao WEN, Gang YIN, Alice yAM
  • Patent number: 12276910
    Abstract: A photoresist composition comprising: a first polymer comprising a first repeating unit comprising a hydroxy-aryl group and a second repeating unit comprising an acid-labile group; a second polymer comprising a first repeating unit comprising an acid-labile group, a second repeating unit comprising a lactone group, and a third repeating unit comprising a base-soluble group, wherein the base-soluble group has a pKa of less than or equal to 12, and wherein the base-soluble group does not comprise a hydroxy-substituted aryl group; a photoacid generator; and a solvent, wherein the first polymer and the second polymer are different from each other.
    Type: Grant
    Filed: June 4, 2021
    Date of Patent: April 15, 2025
    Assignee: DUPONT ELECTRONIC MATERIALS INTERNATIONAL, LLC
    Inventors: Emad Aqad, Brandon Wenning, Choong-Bong Lee, James W. Thackeray, Ke Yang, James F. Cameron
  • Patent number: 12278145
    Abstract: Semiconductor devices and methods of fabricating the semiconductor devices are described herein. The method includes steps for patterning fins in a multilayer stack and forming an opening in a fin as an initial step in forming a multilayer source/drain region. The opening is formed into a parasitic channel region of the fin. Once the opening has been formed, a source/drain barrier material is deposited using a bottom-up deposition process at the bottom of the opening to a level below the multilayer stack. A multilayer source/drain region is formed over the source/drain barrier material. A stack of nanostructures is formed by removing sacrificial layers of the multilayer stack, the multilayer source/drain region being electrically coupled to the stack of nanostructures.
    Type: Grant
    Filed: August 30, 2021
    Date of Patent: April 15, 2025
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chien-Wei Lee, Chii-Horng Li, Bang-Ting Yan, Bo-Yu Lai, Wei-Yang Lee, Chia-Pin Lin
  • Patent number: 12278277
    Abstract: A method for manufacturing a semiconductor device includes forming a first dielectric layer over a semiconductor fin. The method includes forming a second dielectric layer over the first dielectric layer. The method includes exposing a portion of the first dielectric layer. The method includes oxidizing a surface of the second dielectric layer while limiting oxidation on the exposed portion of the first dielectric layer.
    Type: Grant
    Filed: February 16, 2024
    Date of Patent: April 15, 2025
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Sheng-Liang Pan, Yung Tzu Chen, Chung-Chieh Lee, Yung-Chang Hsu, Chia-Yang Hung, Po-Chuan Wang, Guan-Xuan Chen, Huan-Just Lin
  • Publication number: 20250115953
    Abstract: Provided are methylcytosine-selective deaminases, compositions, kits, and methods employing them, including a sequencing method involving (a) contacting a DNA substrate comprising cytosine (C) and at least one methylcytosine nucleobase selected from 5-methylcytosine (5mC) and 5-hydroxymethylcytosine (5hmC) or comprising C and both 5mC and 5hmC, with a methylcytosine-selective deaminase to produce a deamination product, wherein the methylcytosine-selective deaminase (i) is capable of deaminating 5mC to thymidine (T) and/or 5hmC to hydroxymethyluridine (hmU) and (ii) preferentially deaminates the at least one methylcytosine nucleobase relative to cytosine (C); and (b) sequencing the deamination product, or amplifying the deamination product to produce an amplification product, and sequencing the amplification product, in each case, to produce sequence reads, wherein positions of Cs and position of the at least one methylcytosine nucleobase in the DNA substrate is determined based on the sequence reads.
    Type: Application
    Filed: October 7, 2024
    Publication date: April 10, 2025
    Applicant: New England Biolabs, Inc.
    Inventors: Laurence Ettwiller, Peter R. Weigele, Yan-Jiun Lee, Weiwei Yang, Amanda N. Deliberto, Rebekah M. B. Silva, Sean R. Johnson, Colleen E. Yancey
  • Patent number: 12274099
    Abstract: Disclosed herein are global shutter image sensors and methods of operating such image sensors. An image sensor includes a semiconductor wafer having a light receiving surface opposite an electrical connection surface; an oxide extending from the light receiving surface toward the electrical connection surface and at least partially surrounding a pixel region; a photodiode disposed within the pixel region; and a set of storage nodes disposed under the photodiode, between the photodiode and the electrical connection surface. The set of storage nodes comprises a first storage node and a second storage node. The storage nodes may be disposed vertically beneath the photodiode, or side by side.
    Type: Grant
    Filed: March 29, 2022
    Date of Patent: April 8, 2025
    Assignee: Apple Inc.
    Inventors: Dajiang Yang, Hong Wei Lee, Xiaofeng Fan, Oray O. Cellek, Xiangli Li, Kai Shen
  • Patent number: 12272729
    Abstract: According to one example, a method includes performing a first etching process on a fin stack to form a first recess and a second recess at a first depth, the first recess and the second recess on opposite sides of a gate structure that is on the fin stack. The method further includes depositing inner spacers within the first recess and the second recess. The method further includes, after depositing the inner spacers, performing a second etching process to extend a depth of the first recess to a second depth. The method further includes forming a dummy contact region within the first recess, forming a source structure within the first recess on the dummy contact region, and forming a drain structure within the second recess.
    Type: Grant
    Filed: May 5, 2021
    Date of Patent: April 8, 2025
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Feng-Ching Chu, Wei-Yang Lee, Chia-Pin Lin
  • Patent number: 12270595
    Abstract: A refrigerator including a main body forming a storage compartment, and a door configured to open and close the storage compartment. The door includes a door body rotatably coupled to the main body and including an insulator therein, a panel body positioned in a front of the door body, a first trim disposed at a first edge of the panel body and configured to be coupled to the door body while being rotated with respect to the door body, and a second trim disposed at a second edge opposite to the first edge of the panel body and configured to be coupled to the door body when the first trim is coupled to the door body.
    Type: Grant
    Filed: November 27, 2023
    Date of Patent: April 8, 2025
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Chomin Lee, Yang-Yeol Gu, Dongyeong Kim, Byoungmok Kim, Yonghan Kim, Taecheol Park, Yongman Seo, Jinyoung Song, Yountae Shin, Byungkwan Yang
  • Patent number: D1072731
    Type: Grant
    Filed: May 16, 2023
    Date of Patent: April 29, 2025
    Assignee: DELTA ELECTRONICS, INC.
    Inventors: Ting-Yun Lu, Yi-Chih Hsu, Jui-Yang Hung, Shih-Hsiu Lee, Ming-Jen Hsu
  • Patent number: D1072806
    Type: Grant
    Filed: January 24, 2021
    Date of Patent: April 29, 2025
    Assignee: COMPAL ELECTRONICS, INC.
    Inventors: Po-Yang Chien, Hao-Jen Fang, Wei-Yi Chang, Chun-Chieh Chen, Chen-Cheng Wang, Chih-Wen Chiang, Sheng-Hung Lee