Patents by Inventor Yang Lo

Yang Lo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12314283
    Abstract: A system for data object replication includes at least one hardware processor and at least one memory storing instructions. The instructions cause the at least one hardware processor to perform operations including parsing a replication request to obtain a data object and identification information identifying a set of databases at a first deployment of a data provider. A dependency of the data object to one or more additional data objects stored in the set of databases is detected. A sequential replication of the data object and the one or more additional data object from the first deployment to a second deployment of the data provider is performed. The second deployment is identified by the replication request. A sequence of the sequential replication is based on the detected dependency.
    Type: Grant
    Filed: September 15, 2023
    Date of Patent: May 27, 2025
    Assignee: Snowflake Inc.
    Inventors: Robert Bengt Benedikt Gernhardt, Chao-Yang Lo, Nithin Mahesh, Subramanian Muralidhar, Sahaj Saini
  • Publication number: 20250029589
    Abstract: An acoustic metasurface structure is configured to absorb sounds. The acoustic metasurface structure comprises a main body, an externally-connecting configuration and an inner configuration. The externally-connecting configuration and the inner configuration are respectively formed inside the main body. An externally-connecting tube of the externally-connecting configuration is in fluid communication with an external environment and an externally-connecting cavity of the externally-connecting configuration. An inner tube of the inner configuration is in fluid communication with the externally-connecting cavity and an inner cavity of the inner configuration. With the externally-connecting configuration and the inner configuration forming a series-type structure in the main body, the acoustic metasurface structure increases an acoustic impedance.
    Type: Application
    Filed: July 18, 2023
    Publication date: January 23, 2025
    Inventors: JUNG-SAN CHEN, TZU-HUEI KUO, WEI-CHUN WANG, WEN-YANG LO, CHENG-YI WANG
  • Publication number: 20240004901
    Abstract: A system for data object replication includes at least one hardware processor and at least one memory storing instructions. The instructions cause the at least one hardware processor to perform operations including parsing a replication request to obtain a data object and identification information identifying a set of databases at a first deployment of a data provider. A dependency of the data object to one or more additional data objects stored in the set of databases is detected. A sequential replication of the data object and the one or more additional data object from the first deployment to a second deployment of the data provider is performed. The second deployment is identified by the replication request. A sequence of the sequential replication is based on the detected dependency.
    Type: Application
    Filed: September 15, 2023
    Publication date: January 4, 2024
    Inventors: Robert Bengt Benedikt Gernhardt, Chao-Yang Lo, Nithin Mahesh, Subramanian Muralidhar, Sahaj Saini
  • Patent number: 11860896
    Abstract: A system for data object replication includes at least one hardware processor and at least one memory storing instructions. The instructions cause the at least one hardware processor to perform operations including decoding a replication request to obtain a data object. Object dependencies associated with the data object and a plurality of additional data objects are determined. A replication sequence of the data object and the plurality of additional data objects is determined based on the object dependencies. A replication of the data object and at least one of the plurality of additional data objects is performed according to the replication sequence. A notification of a successful completion of the replication is generated.
    Type: Grant
    Filed: September 27, 2022
    Date of Patent: January 2, 2024
    Assignee: Snowflake Inc.
    Inventors: Robert Bengt Benedikt Gernhardt, Chao-Yang Lo, Nithin Mahesh, Subramanian Muralidhar, Sahaj Saini
  • Publication number: 20230185825
    Abstract: A system for data object replication includes at least one hardware processor and at least one memory storing instructions. The instructions cause the at least one hardware processor to perform operations including decoding a replication request to obtain a data object. Object dependencies associated with the data object and a plurality of additional data objects are determined. A replication sequence of the data object and the plurality of additional data objects is determined based on the object dependencies. A replication of the data object and at least one of the plurality of additional data objects is performed according to the replication sequence. A notification of a successful completion of the replication is generated.
    Type: Application
    Filed: September 27, 2022
    Publication date: June 15, 2023
    Inventors: Robert Bengt Benedikt Gernhardt, Chao-Yang LO, Nithin Mahesh, Subramanian Muralidhar, Sahaj Saini
  • Patent number: 11494411
    Abstract: Provided herein are systems and methods for configuring replication of account object metadata. A system includes at least one hardware processor coupled to a memory and configured to decode a replication request received from a client device of a data provider. The replication request indicates at least a first account object, a source account, and a target account of the data provider. An object dependency of the at least first account object to at least a second account object of the data provider is determined. A replication of the at least first account object and the at least second account object is performed from the source account into the target account of the data provider.
    Type: Grant
    Filed: December 10, 2021
    Date of Patent: November 8, 2022
    Assignee: Snowflake Inc.
    Inventors: Robert Bengt Benedikt Gernhardt, Chao-Yang Lo, Nithin Mahesh, Subramanian Muralidhar, Sahaj Saini
  • Patent number: 11018259
    Abstract: A semiconductor device includes a substrate, at least one source drain feature, a gate structure, and at least one gate spacer. The source/drain feature is present at least partially in the substrate. The gate structure is present on the substrate. The gate spacer is present on at least one sidewall of the gate structure. At least a bottom portion of the gate spacer has a plurality of dopants therein.
    Type: Grant
    Filed: May 20, 2016
    Date of Patent: May 25, 2021
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Wei-Yang Lo, Tung-Wen Cheng, Chia-Ling Chan, Mu-Tsang Lin
  • Patent number: 10910496
    Abstract: A semiconductor device includes a fin-like structure extending along a first axis; a first source/drain feature disposed at a first end portion of the fin-like structure; and a constraint layer disposed at a first side of the first end portion of the fin-like structure, wherein the first source/drain feature comprises a first portion, disposed at the first side, the first portion comprising a shorter extended width along a second axis, and a second portion, disposed at a second side that is opposite to the first side, the second portion comprising a longer extended width along the second axis.
    Type: Grant
    Filed: June 11, 2020
    Date of Patent: February 2, 2021
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Wei-Yang Lo, Tung-Wen Cheng
  • Patent number: 10879399
    Abstract: A semiconductor device includes a substrate, at least one source drain feature, a gate structure, and at least one gate spacer. The source/drain feature is present at least partially in the substrate. The gate structure is present on the substrate. The gate spacer is present on at least one sidewall of the gate structure. At least a bottom portion of the gate spacer has a plurality of dopants therein.
    Type: Grant
    Filed: September 19, 2018
    Date of Patent: December 29, 2020
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LIMITED
    Inventors: Wei-Yang Lo, Tung-Wen Cheng, Chia-Ling Chan, Mu-Tsang Lin
  • Patent number: 10868005
    Abstract: An embodiment is a structure including a first fin over a substrate, a second fin over the substrate, the second fin being adjacent the first fin, an isolation region surrounding the first fin and the second fin, a first portion of the isolation region being between the first fin and the second fin, a gate structure along sidewalls and over upper surfaces of the first fin and the second fin, the gate structure defining channel regions in the first fin and the second fin, a gate seal spacer on sidewalls of the gate structure, a first portion of the gate seal spacer being on the first portion of the isolation region between the first fin and the second fin, and a source/drain region on the first fin and the second fin adjacent the gate structure.
    Type: Grant
    Filed: December 19, 2019
    Date of Patent: December 15, 2020
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Tung-Wen Cheng, Chih-Shan Chen, Wei-Yang Lo
  • Publication number: 20200303552
    Abstract: A semiconductor device includes a fin-like structure extending along a first axis; a first source/drain feature disposed at a first end portion of the fin-like structure; and a constraint layer disposed at a first side of the first end portion of the fin-like structure, wherein the first source/drain feature comprises a first portion, disposed at the first side, the first portion comprising a shorter extended width along a second axis, and a second portion, disposed at a second side that is opposite to the first side, the second portion comprising a longer extended width along the second axis.
    Type: Application
    Filed: June 11, 2020
    Publication date: September 24, 2020
    Inventors: Wei-Yang Lo, Tung-Wen Cheng
  • Patent number: 10770569
    Abstract: A transistor includes a semiconductive fin having a channel portion, a gate stack over the channel portion of the semiconductive fin, source and drain structures on opposite sides of the gate stack and adjoining the semiconductive fin, and a sidewall structure extending along sidewalls of a body portion of the source structure. The source structure has a curved top, and the source structure has a top portion protruding over a top of the sidewall structure.
    Type: Grant
    Filed: June 10, 2019
    Date of Patent: September 8, 2020
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Wei-Yang Lo, Shih-Hao Chen, Mu-Tsang Lin, Tung-Wen Cheng
  • Patent number: 10665719
    Abstract: A semiconductor device includes a fin-like structure extending along a first axis; a first source/drain feature disposed at a first end portion of the fin-like structure; and a constraint layer disposed at a first side of the first end portion of the fin-like structure, wherein the first source/drain feature comprises a first portion, disposed at the first side, the first portion comprising a shorter extended width along a second axis, and a second portion, disposed at a second side that is opposite to the first side, the second portion comprising a longer extended width along the second axis.
    Type: Grant
    Filed: July 27, 2018
    Date of Patent: May 26, 2020
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Wei-Yang Lo, Tung-Wen Cheng
  • Publication number: 20200126983
    Abstract: An embodiment is a structure including a first fin over a substrate, a second fin over the substrate, the second fin being adjacent the first fin, an isolation region surrounding the first fin and the second fin, a first portion of the isolation region being between the first fin and the second fin, a gate structure along sidewalls and over upper surfaces of the first fin and the second fin, the gate structure defining channel regions in the first fin and the second fin, a gate seal spacer on sidewalls of the gate structure, a first portion of the gate seal spacer being on the first portion of the isolation region between the first fin and the second fin, and a source/drain region on the first fin and the second fin adjacent the gate structure.
    Type: Application
    Filed: December 19, 2019
    Publication date: April 23, 2020
    Inventors: Tung-Wen Cheng, Chih-Shan Chen, Wei-Yang Lo
  • Patent number: 10515958
    Abstract: An embodiment is a structure including a first fin over a substrate, a second fin over the substrate, the second fin being adjacent the first fin, an isolation region surrounding the first fin and the second fin, a first portion of the isolation region being between the first fin and the second fin, a gate structure along sidewalls and over upper surfaces of the first fin and the second fin, the gate structure defining channel regions in the first fin and the second fin, a gate seal spacer on sidewalls of the gate structure, a first portion of the gate seal spacer being on the first portion of the isolation region between the first fin and the second fin, and a source/drain region on the first fin and the second fin adjacent the gate structure.
    Type: Grant
    Filed: July 31, 2018
    Date of Patent: December 24, 2019
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Tung-Wen Cheng, Chih-Shan Chen, Wei-Yang Lo
  • Publication number: 20190312131
    Abstract: A transistor includes a semiconductive fin having a channel portion, a gate stack over the channel portion of the semiconductive fin, source and drain structures on opposite sides of the gate stack and adjoining the semiconductive fin, and a sidewall structure extending along sidewalls of a body portion of the source structure. The source structure has a curved top, and the source structure has a top portion protruding over a top of the sidewall structure.
    Type: Application
    Filed: June 10, 2019
    Publication date: October 10, 2019
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Wei-Yang LO, Shih-Hao CHEN, Mu-Tsang LIN, Tung-Wen CHENG
  • Publication number: 20190297846
    Abstract: A pet pacifying environmental device includes a base, a cover mounted on the base, and a low-frequency radio wave generator mounted between the base and the cover.
    Type: Application
    Filed: March 30, 2018
    Publication date: October 3, 2019
    Inventors: Yung-Teng Lo, Feng-Jung Lo, Feng-Yang Lo, Kuo-Lun Lo
  • Patent number: 10319842
    Abstract: A method for manufacturing a semiconductor device includes forming a gate stack over a semiconductor fin such that the gate stack exposes the semiconductor fin. The semiconductor fin exposed by the gate stack is recessed. An epitaxy structure is epitaxially grown on a recessed portion of the semiconductor fin, and the epitaxy structure is etched such that the epitaxy structure has a curved top.
    Type: Grant
    Filed: March 23, 2018
    Date of Patent: June 11, 2019
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Wei-Yang Lo, Shih-Hao Chen, Mu-Tsang Lin, Tung-Wen Cheng
  • Publication number: 20190035933
    Abstract: A semiconductor device includes a fin-like structure extending along a first axis; a first source/drain feature disposed at a first end portion of the fin-like structure; and a constraint layer disposed at a first side of the first end portion of the fin-like structure, wherein the first source/drain feature comprises a first portion, disposed at the first side, the first portion comprising a shorter extended width along a second axis, and a second portion, disposed at a second side that is opposite to the first side, the second portion comprising a longer extended width along the second axis.
    Type: Application
    Filed: July 27, 2018
    Publication date: January 31, 2019
    Inventors: Wei-Yang LO, Tung-Wen CHENG
  • Publication number: 20190019892
    Abstract: A semiconductor device includes a substrate, at least one source drain feature, a gate structure, and at least one gate spacer. The source/drain feature is present at least partially in the substrate. The gate structure is present on the substrate. The gate spacer is present on at least one sidewall of the gate structure. At least a bottom portion of the gate spacer has a plurality of dopants therein.
    Type: Application
    Filed: September 19, 2018
    Publication date: January 17, 2019
    Inventors: Wei-Yang Lo, Tung-Wen Cheng, Chia-Ling Chan, Mu-Tsang Lin