Patents by Inventor Yang Lu
Yang Lu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20260323486Abstract: Method and system for user equipment (UE) to access the communications network comprising the UE receiving a public land mobile network identifier (PLMN ID) from the communications network. The UE determining that the received PLMN ID is associated with a non-terrestrial network (NTN) by matching the received PLMN ID with a PLMN ID stored within the UE. When the UE determines that the received PLMN ID is associated with an NTN, modifying operating characteristics of the UE.Type: ApplicationFiled: February 2, 2026Publication date: October 15, 2026Inventors: Alexey KULAKOV, Yang LU, Peter Alexander WILD, Chris PUDNEY
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Publication number: 20260319887Abstract: A memory device includes a memory array organized into banks, with each bank including a number of rows, each of which stores a number of codewords. Over the course an error check and scrub (ECS) cycle, ECS addresses for each codeword are sequentially generated and each codeword is checked for errors and those errors are corrected. One or more ECS operations may be performed responsive to an ECS command. The ECS command may specify address information about where the ECS operation(s) should be performed.Type: ApplicationFiled: January 30, 2026Publication date: October 15, 2026Applicant: Micron Technology, Inc.Inventors: Yang Lu, David R. Brown, Kang-Yong Kim, Gary Howe
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Patent number: 12761821Abstract: Apparatuses and methods per-row count based refresh target identification. A memory device stores count values associated with the word lines. An aggressor detector circuit stores a maximum of the count values and a row address associated with the maximum count value. Responsive to a targeted refresh signal, the stored count value is compared to a threshold. If the count value has crossed the threshold, then a targeted refresh operation may be performed on one or more refresh addresses based on the stored address, and the count value may be reset.Type: GrantFiled: June 14, 2024Date of Patent: October 13, 2026Assignee: Micron Technology, Inc.Inventors: Yang Lu, Yuan He, Kang-Yong Kim, Randall J. Rooney, Dong Pan
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Publication number: 20260311399Abstract: A method comprising obtaining, by a computing device, an image generation prompt that includes a description of an image to be generated. The method further includes providing, by the computing device, the image generation prompt to a machine learning model. The method further includes obtaining, by the computing device, the image from the machine learning model. The method further includes outputting, by the computing device, a graphical user interface that includes the image.Type: ApplicationFiled: June 26, 2023Publication date: October 8, 2026Applicant: Google LLCInventors: Jiawei Chen, Jiabao Guo, Rongjing Xiang, Yun Lin, Yang Lu, Lin Guo, Xu Liu, Yang Ren, Liangyi Ou, Dun Liu
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Patent number: 12755806Abstract: Apparatuses and techniques for logging a memory address associated with faulty usage-based disturbance data are described. In an example aspect, a memory device can detect, at a local-bank level, a fault associated with usage-based disturbance data. This detection enables the memory device to log a row address associated with the faulty usage-based disturbance data. To avoid increasing a complexity and/or a size of the memory device, some implementations of the memory device can perform the address logging at the multi-bank level with the assistance of an engine, such as a test engine. The memory device stores the logged address in at least one mode register to communicate the fault to a memory controller. With the logged address, the memory controller can initiate a repair procedure to fix the faulty usage-based disturbance data.Type: GrantFiled: July 31, 2024Date of Patent: October 6, 2026Assignee: Micron Technology, Inc.Inventors: Yang Lu, Mark Kalei Hadrick, Kang-Yong Kim, Donald Morgan, Victor Wong
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Patent number: 12757004Abstract: The embodiments of the present disclosure provide an integrated access and backhaul (IAB) communication device and a method thereof. The method includes: adding, by a second donor distributed unit (a target donor-DU), a header related to a transport network layer (TNL) tunnel to uplink data, and transmitting the uplink data to a first donor distributed unit (a source donor-DU) via the TNL tunnel; and/or adding, by a first donor distributed unit (a source donor-DU), a header related to a transport network layer (TNL) tunnel to downlink data, and transmitting the downlink data to a second donor distributed unit (a target donor-DU) via the TNL tunnel.Type: GrantFiled: February 2, 2024Date of Patent: October 6, 2026Assignee: 1FINITY Inc.Inventors: Yang Lu, Su Yi
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Patent number: 12749521Abstract: Apparatuses and techniques for performing serialized update procedures during a refresh period are described. In example aspects, a memory device performs a normal refresh operation, which refreshes multiple rows simultaneously. The refreshed rows are associated with different refresh sections and different column segments. While refreshing the rows and prior to an end of a refresh cycle time (tRFC), the memory device updates, in a serialized manner, usage-based-disturbance data that is stored within the refreshed rows. In particular, the memory device performs, in series, multiple update procedures, which overwrites values of the usage-based-disturbance data that are stored within the refreshed rows. For example, the multiple update procedures can set values of activation counts that are stored within the refreshed rows to a predetermined value.Type: GrantFiled: January 10, 2025Date of Patent: September 29, 2026Assignee: Micron Technology, Inc.Inventors: Yang Lu, Donald Morgan, QiaoHua Dong
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Publication number: 20260290490Abstract: Embodiments of the disclosure are drawn to apparatuses, systems, and methods for managing sPPR undo operations based on activation count values of original rows after a repair. After packaging, it may be necessary to perform post-package repair operations on rows of the memory. During an sPPR operation, an address of an original row of memory may be associated with an open repair address instead, such as when the original row is determined to be damaged or defective. The sPPR repair may be reversed by performing an sPPR undo operation. While the repair row is associated with the original row, the activation count of the original row may become corrupted, and it may be necessary to reset the activation count associated with the original row during a repair undo operation to prevent unnecessary refresh operations occurring on the original row and adjacent rows.Type: ApplicationFiled: March 16, 2026Publication date: September 24, 2026Applicant: Micron Technology, Inc.Inventors: John E. Riley, Yang Lu, Randall J. Rooney
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Publication number: 20260290425Abstract: A value associated with a number of accesses of a word line and a length of said accesses may be stored on said word line. A timer may provide a periodic signal that increments a counter to update the value. The updated value may then be written back to the word line. In some examples, a memory device including the word lines may have a specification that prevents the word line from closing prior to writing the updated value to the word line.Type: ApplicationFiled: May 27, 2026Publication date: September 24, 2026Applicant: Micron Technology, Inc.Inventors: Yuan He, Yang Lu, Dong Pan, Kang-Yong Kim
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Publication number: 20260288561Abstract: Apparatuses and techniques for implementing usage-based-disturbance alert signaling are described. The technology allows usage-based-disturbance (UBD) alerts to be externally communicated from a memory device without a dedicated external interface. Rather, UBD alerts are combined with memory error/alert signals and communicated on a shared alert-related interface. UBD tracking occurs at the memory bank level, with corresponding independent UBD alert signals. These signals are efficiently combined to generate an overall UBD alert. A temporary backoff signal is generated when an overall UBD alert is sent. The backoff signal ensures requisite external timing parameters are met while allowing the individual memory banks to generate persistent UBD alerts.Type: ApplicationFiled: May 4, 2026Publication date: September 24, 2026Applicant: Micron Technology, Inc.Inventors: Yang Lu, Victor Wong, Donald Morgan
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Publication number: 20260288353Abstract: Apparatuses and methods per-row count based refresh target identification. A memory device stores count values associated with the word lines. An aggressor detector circuit stores a maximum of the count values and a row address associated with the maximum count value. Responsive to a targeted refresh signal, the stored count value is compared to a threshold. If the count value has crossed the threshold, then a targeted refresh operation may be performed on one or more refresh addresses based on the stored address, and the count value may be reset.Type: ApplicationFiled: June 2, 2026Publication date: September 24, 2026Applicant: Micron Technology, Inc.Inventors: Yang Lu, Yuan He, Kang-Yong Kim, Randall J. Rooney, Dong Pan
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Publication number: 20260290434Abstract: Single (1T) and multi (MT) memory cell architectures may be included in a same memory array. In some embodiments, the individual memory cells of the MT memory cells may have a same polarity. In some embodiments, the individual memory cells of the MT memory cells may have complementary polarity. In some examples, digit lines at memory mats and edge memory mats may be folded for MT memory cells. In some examples, digit lines may be rerouted through local input-output line breaks for the MT memory cells. In some examples, the LIO lines from the MT memory cells may be twisted. In some examples, larger sense amplifiers may be used for the MT memory cells.Type: ApplicationFiled: May 19, 2026Publication date: September 24, 2026Applicant: Micron Technology, Inc.Inventors: Yang Lu, Michael A. Shore
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Publication number: 20260280099Abstract: This application provides a cavity antenna and an electronic device. The cavity antenna includes a metal backplane, a dielectric substrate, and a flexible printed circuit board. The dielectric substrate is located between the flexible printed circuit board and the metal backplane. The flexible printed circuit board is electrically connected to the metal backplane. The flexible printed circuit board includes a body part and a bending plate. The body part is provided with an avoidance hole. The avoidance hole is spaced apart from a peripheral surface of the body part. The bending plate is fixedly connected to a hole wall of the avoidance hole and is bendable relative to the body part. When the bending plate is bent relative to the body part, the bending plate is electrically connected to the metal backplane.Type: ApplicationFiled: May 14, 2026Publication date: September 17, 2026Inventors: Aofang ZHANG, Yang LU, Shaojie CHU, Ning MA
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Publication number: 20260278077Abstract: Apparatuses and techniques for enabling efficient usage-based-disturbance (UBD) mitigation are described. Mitigating the adverse effects of UBD can entail tracking a quantity of accesses to memory rows using activation counts. Generally, the activation count of a particular row can be reset to zero based on memory refresh operations applied to the particular row and proximate rows thereof. The multiple storage bits for the UBD data consume chip area, and manipulating the storage bits consumes power. Described implementations increase the effective quantity of UBD data bits without increasing chip area. By the strategic placement of a refresh flag in proximity to certain bits of the activation count, power can be saved when manipulating the UBD data in response to a refresh operation by asserting the relevant column select circuitry. Further, enhancing the evaluation of a refresh boundary can facilitate updating the activation count during memory access read and write operations.Type: ApplicationFiled: March 13, 2025Publication date: September 17, 2026Applicant: Micron Technology, Inc.Inventor: Yang Lu
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Patent number: 12737123Abstract: Apparatuses and methods aggressor queue mitigation based threshold. A memory device detects aggressor rows by changing a count value associated with the row when it is accessed and comparing the count value to a mitigation threshold. Identified aggressor rows are stored in an aggressor queue. The value of the mitigation threshold is set based on a number of addresses which are stored in the aggressor queue. For example the threshold may increase as the number of addresses in the queue increases.Type: GrantFiled: June 12, 2024Date of Patent: September 15, 2026Assignee: Micron Technology, Inc.Inventor: Yang Lu
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Patent number: 12737133Abstract: Systems, methods, and apparatus for memory device security and row hammer mitigation are described. A control mechanism may be implemented in a front-end and/or a back-end of a memory sub-system to refresh rows of the memory. A row activation command having a row address at control circuitry of a memory sub-system and incrementing a first count of a row counter corresponding to the row address stored in a content addressable memory (CAM) of the memory sub-system may be received. Control circuitry may determine whether the first count is greater than a row hammer threshold (RHT) minus a second count of a CAM decrease counter (CDC); the second count may be incremented each time the CAM is full. A refresh command to the row address may be issued when a determination is made that the first count is greater than the RHT minus the second count.Type: GrantFiled: August 19, 2024Date of Patent: September 15, 2026Assignee: Micron Technology, Inc.Inventors: Yang Lu, Sujeet Ayyapureddi, Edmund J. Gieske, Cagdas Dirik, Ameen D. Akel, Elliott C. Cooper-Balis, Amitava Majumdar, Robert M. Walker, Danilo Caraccio
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Publication number: 20260269026Abstract: The present disclosure provides systems and methods for assessing a mental state of a subject in a single session or over multiple different sessions, using for example an automated module to present and/or formulate at least one query based in part on one or more target mental states to be assessed. The query may be configured to elicit at least one response from the subject. The query may be transmitted in an audio, visual, and/or textual format to the subject to elicit the response. Data comprising the response from the subject can be received. The data can be processed using one or more individual, joint, or fused models. One or more assessments of the mental state associated with the subject can be generated for the single session, for each of the multiple different sessions, or upon completion of one or more sessions of the multiple different sessions.Type: ApplicationFiled: April 24, 2026Publication date: September 10, 2026Inventors: Elizabeth Shriberg, Michael Aratow, Mainul Islam, Amir Hossein Harati Nejad Torbati, Tomasz Rutowski, David Lin, Yang Lu, Farshid Haque, Robert D. Rogers
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Publication number: 20260267539Abstract: Methods, systems, and devices for power stabilization for memory systems are described. A memory system may be implemented with a power source that is configured to adjust one or more aspects of its regulation based on an indication associated with a power consumption for one or more operations to be performed by the memory system. For example, a memory system may include a controller configured to determine the power consumption for performing upcoming operations (e.g., based on the quantity of operations and the type of operations), and transmit an indication associated with the power consumption to the power source (e.g., as a proactive or feed-forward control indication). The power source may adjust its regulation based on the indication from the controller, which may include adjusting gains, circuitry, or other regulation configurations or characteristics associated with providing the power for performing the upcoming operations (e.g., at a regulated voltage).Type: ApplicationFiled: February 11, 2026Publication date: September 10, 2026Inventors: Junxian Ding, Yang Lu
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Patent number: 12731629Abstract: Apparatuses and techniques for efficient handling of data errors and usage-based disturbances are described. To enable efficient utilization of time-limited resources, a memory device includes control circuitry that performs multiple different types of operations responsive to “confiscating” a refresh-pump time interval. The memory device is responsible for performing various functionalities internally while reducing the impact such functionalities may have on servicing memory requests from an external entity. Accordingly, a memory device may confiscate refresh-pump opportunities and instead perform other operations. To efficiently utilize a refresh-pump opportunity, the control circuitry can perform an error-handling operation on a codeword stored in a first bank and perform a usage-based disturbance mitigation operation on a row in a second bank during the confiscated time interval. Further, the usage-based disturbance mitigation operation can be performed across multiple banks except for the first bank.Type: GrantFiled: July 2, 2024Date of Patent: September 8, 2026Assignee: Micron Technology, Inc.Inventors: Yang Lu, Donald Morgan, Mark Kalei Hadrick, Victor Wong, Kang-Yong Kim
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Publication number: 20260261838Abstract: A method for providing roaming radio access at a first Public Land Mobile Network, PLMN. An indicator is broadcast from a radio access node of the first PLMN, the indicator indicating that the access node will provide connectivity service to subscribers of a second, different PLMN, despite the subscribers of the second PLMN having a forbidden PLMN list that includes the first PLMN.Type: ApplicationFiled: June 26, 2023Publication date: September 3, 2026Inventors: Alexey KULAKOV, Peter Alexander WILD, Robin FRIEDRICH, Christopher PUDNEY, Yang LU