Patents by Inventor Yang Lv

Yang Lv has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20260164933
    Abstract: A display substrate and preparation method therefor, and display apparatus. The display substrate includes multiple circuit units, a circuit unit includes a pixel drive circuit, a first scan signal line, a second scan signal line, a third scan signal line and a light emitting signal line. The pixel drive circuit at least includes an eighth transistor and a ninth transistor. An orthographic projection of first scan signal line on a plane of the display substrate at least partially overlaps that of second scan signal line on the plane of the display substrate, an orthographic projection of third scan signal line on the plane of the display substrate at least partially overlaps that of light emitting signal line on plane of the display substrate, an orthographic projection of eighth transistor on the plane of the display substrate at least partially overlaps that of ninth transistor on plane of the display substrate.
    Type: Application
    Filed: August 31, 2023
    Publication date: June 11, 2026
    Inventors: Jiao ZHAO, Meng ZHAO, Yuzhen GUO, Chenyang ZHANG, Xiaorong CUI, Lipeng GAO, Haoliang ZHENG, Minghua XUAN, Ying ZHOU, Feng GUAN, Jianhua DU, Yang LV, Chaolu WANG, Yicheng WANG, Rui YAN, Hao WU, Li XIAO
  • Patent number: 12648285
    Abstract: A driving backplane includes a first substrate, a thick copper layer, a second substrate, and a driving layer stacked in sequence. The thick copper layer is provided with a driving wire configured to load a driving signal. The driving layer is provided with a driving circuit. The driving circuit is electrically connected to the driving wire through a via.
    Type: Grant
    Filed: March 31, 2023
    Date of Patent: June 2, 2026
    Assignee: BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Xue Dong, Feng Guan, Guangcai Yuan, Ce Ning, Minghua Xuan, Haoliang Zheng, Fei Wang, Jianhua Du, Yang Lv, Chaolu Wang
  • Publication number: 20260120248
    Abstract: An emission tomography image processing method includes: acquiring local medical images of a target object, where different local medical images correspond to different spatial positions or different tissue regions; predicting noise level information corresponding to the local medical images; and performing, based on the noise level information corresponding to the local medical images, image denoising on the local medical images to obtain a target medical image, where at least two of the local medical images correspond to different noise level information.
    Type: Application
    Filed: October 24, 2025
    Publication date: April 30, 2026
    Inventors: Hancong Xu, Huifang Xie, Yang Lv, Yun Dong
  • Publication number: 20260079270
    Abstract: The present disclosure relates to a method for identifying a prompt-y event, which includes: obtaining first time-of-flight (TOF) data of multiple double coincidence events detected by a detector device; determining second TOF data of one or more triple coincidence events based on the first TOF data, performing verification operations on the second TOF data of the triple coincidence events to determine a prompt-? event in each of the triple coincidence events. The embodiments of this application can effectively identify prompt gamma photon events by using TOF data, which is helpful for separating dual-nuclide signals.
    Type: Application
    Filed: September 15, 2025
    Publication date: March 19, 2026
    Inventors: Jin REN, Yilin LIU, Yang LV, Yun DONG
  • Patent number: 12579709
    Abstract: The present disclosure discloses an image special effect processing method and apparatus, an electronic device and a computer-readable storage medium. The method includes: in response to an instruction for adding a special effect object on an initial image, determining a target display region of the special effect object on the initial image, where the target display region is a foreground region or a background region of the initial image, the foreground region is an image region where a target object is located in the initial image, and the background region is an image region other than the foreground region in the initial image; and displaying a part of the special effect object located in the target display region on the initial image to obtain a target image.
    Type: Grant
    Filed: August 15, 2022
    Date of Patent: March 17, 2026
    Assignee: BEIJING BYTEDANCE NETWORK TECHNOLOGY CO., LTD.
    Inventors: Juntao Sun, Yang Lv, Gao Liu, Ruifeng Ma
  • Publication number: 20260057513
    Abstract: A system and a method for medical image processing are provided. The method includes: obtaining a first medical image; obtaining a trained image perception restoration model; the trained image perception restoration model includes an image quality perception sub-model and an image restoration sub-model; and inputting the first medical image into the trained image perception restoration model to obtain a second medical image. The image quality perception sub-model is configured to determine either or both of a first quality evaluation value of the first medical image and a second quality evaluation value of the second medical image, the image restoration sub-model is configured to determine the second medical image, and the quality of the second medical image is higher than that of the first medical image.
    Type: Application
    Filed: August 25, 2025
    Publication date: February 26, 2026
    Inventors: Chen XI, Yang LV, Yun DONG
  • Publication number: 20260047448
    Abstract: Disclosed in this disclosure are a pad, lead frame, and sensor packaging structure for attenuating an eddy current effect, which are applied to the field of semiconductor preparation. The pad includes a first pad component and a second pad component, where the first pad component and the second pad component are disposed on two adjacent sides of a chip placement region; and the first pad component and the second pad component are electrically connected, such that the first pad component and the second pad component surround the chip placement region on the two adjacent sides. In this disclosure, by means of arranging the pad along two adjacent sides of a chip, the formation of closed eddy current loops in a metal frame can be further reduced, thereby weakening the impact of a reversed magnetic field, and thus improving the detection sensitivity and accuracy of a sensor.
    Type: Application
    Filed: October 16, 2025
    Publication date: February 12, 2026
    Applicant: NINGBO CRRC TIMES TRANSDUCER TECHNOLOGY CO., LTD
    Inventors: Yang LV, Yanan SHI, Huaxiong ZHENG, Mingming WU, Liangguang ZHENG
  • Publication number: 20260033346
    Abstract: A lead-wire frame structure for packaging and a sensor package structure, which are applied to the field of sensor preparation. The lead-wire frame structure comprises: a bonding-pad component and a plurality of pin components, wherein the bonding-pad component is provided with an inward recess in a plane direction of a coplane which is formed by the bonding-pad component and the plurality of pin components. In the plane direction, arc-shaped packaging interfaces for offsetting stresses are formed in an aligned manner on an inner contour of the recess and an outer contour of the recess in the bonding-pad component. In the present application, the bonding-pad component is provided with the inward recess in the plane direction, and the aligned packaging interfaces of the inner contour of the recess and the outer contour of the recess arc designed to be of arc-shaped structures, which can offset internal and external stresses.
    Type: Application
    Filed: September 28, 2025
    Publication date: January 29, 2026
    Applicant: NINGBO CRRC TIMES TRANSDUCER TECHNOLOGY CO., LTD
    Inventors: Yang LV, Yanan SHI, Juping LI, Xiaowei HOU, Hao JIANG, Mingming WU
  • Patent number: 12537906
    Abstract: The present disclosure provides video effect packet generation method and apparatus, device, and storage medium. The method of generating the video effects package includes: obtaining an effects control with an empty input in a general effects graph, and determining the effects control as a target effects control; obtaining effects information in the target effects control and switching to a script effects graph; creating, in the script effects graph and according to the creation operation triggered by the user, a getting control, a frame capture control, a selection control and a setting control, the getting control and the setting control corresponding to the effects information; connecting the getting control, the frame capture control, the selection control and the setting control in sequence to input the captured video frames to the target effects control to generate a video effects package.
    Type: Grant
    Filed: December 6, 2022
    Date of Patent: January 27, 2026
    Assignee: BEIJING BYTEDANCE NETWORK TECHNOLOGY CO., LTD.
    Inventors: Yang Lv, Ruifeng Ma
  • Publication number: 20260023102
    Abstract: A packaged chip and a current sensor, which are applied to the field of chip packaging. The packaged chip comprises: a substrate, a protective layer made of the same material as the substrate, and an active region prepared on one side surface of the substrate, wherein the side of the active region facing away from the substrate is bonded to the protective layer; and an isolation structure is formed between the protective layer and the substrate and on a side face of the active region. By means of the present application, the side, facing away from a substrate, of an active region prepared on the substrate is connected to a protective layer, and an isolation structure is formed between the protective layer and the substrate and on a side face of the active region, such that insulated isolation for the active region is formed.
    Type: Application
    Filed: September 24, 2025
    Publication date: January 22, 2026
    Applicant: NINGBO CRRC TIMES TRANSDUCER TECHNOLOGY CO., LTD
    Inventors: Yang LV, Yanan SHI, Xiaowei HOU, Po ZHANG, Mingming WU
  • Publication number: 20260019559
    Abstract: The embodiments relate to the field of terminals, and provide a processing method for a virtual display and an electronic device. The method includes: communicating with an application process by using a communication thread in an image processing process when the image processing process performs graphic interface (GI) composition of a first frame, to obtain a communication result; and sending a composite GI to the virtual display created by the application process when the communication result is normal, and deleting a virtual display object when the communication result is abnormal. In this case, a task thread of the image processing process is prevented from being blocked when the application process does not respond in time or the communication with the image processing process is abnormal, so that impact from the abnormality is controlled in the communication thread without spreading to other task threads.
    Type: Application
    Filed: September 24, 2025
    Publication date: January 15, 2026
    Applicant: HONOR DEVICE CO., LTD.
    Inventor: Yang Lv
  • Publication number: 20260008900
    Abstract: Disclosed are a rubber asphalt-derived volatile organic compounds (VOCs) inhibitor based on a metal organic frameworks (MOFs) material and a preparation method thereof, and a smoke-suppression rubber asphalt and a preparation method thereof. The inhibitor has a chemical formula of CxHyO32Zr6, where x is in a range of 48 to 120, and y is in a range of 28 to 76; and the inhibitor is a zirconium-based MOFs material having a cubic crystal structure with a crystal pore size of 0.5 nm to 2 nm and a specific surface area of 1,000 m2/g to 3,200 m2/g.
    Type: Application
    Filed: July 3, 2024
    Publication date: January 8, 2026
    Inventors: Shaopeng WU, Yang Lv, Na LI, Jun XIE, Quantao LIU, Anqi CHEN, Huan WANG
  • Patent number: 12520590
    Abstract: A thin film transistor includes a substrate and an active layer having a channel region. The active layer includes a first active pattern and at least one second active pattern. The first active pattern includes a bottom surface, a top surface and at least one side surface. The at least one side surface connects the bottom and top surfaces, and is in contact with the at least one second active pattern. A length direction of each side surface is approximately perpendicular to a length direction of the channel region. A material of at least the top surface of the first active pattern includes a first polysilicon material, and a material of the second active pattern includes a second polysilicon material; and in the length direction of the channel region, an average grain size of the first polysilicon material is greater than an average grain size of the second polysilicon material.
    Type: Grant
    Filed: July 8, 2021
    Date of Patent: January 6, 2026
    Assignee: BOE TECHNOLOGY GROUP CO., LTD.
    Inventor: Yang Lv
  • Publication number: 20250383405
    Abstract: A high-voltage sampling circuit includes a high-voltage MOS transistor and a battery sampling device. An output terminal of the battery sampling device is connected to a gate of the high-voltage MOS transistor and is configured to output a high or low level; an analog-to-digital conversion terminal thereof is connected to a source of the high-voltage MOS transistor and is configured to collect a voltage at the source of the high-voltage MOS transistor. A drain of the high-voltage MOS transistor is connected to the positive electrode of the battery pack through a first voltage-dividing resistor, and the source thereof is connected to the negative electrode of the battery pack through a second voltage-dividing resistor. The battery sampling device is configured to, when outputting a high level to the high-voltage MOS transistor, collect the voltage passing through the MOS transistor and convert the voltage to obtain a supply voltage of the battery pack.
    Type: Application
    Filed: August 4, 2025
    Publication date: December 18, 2025
    Inventors: Bo Yang, Deting CHEN, Gang LIU, Xiao CHEN, Yang LV, Yangfan HE, Yaqi NIU
  • Publication number: 20250383969
    Abstract: Various embodiments include methods and devices for identifying core threads of a program executing by a processor. Some embodiments may include hooking an event by a kernel interface, calculating a total time cost for executing a thread of the program based on hooking the event by the kernel interface, returning the total time cost for executing the thread and a thread identifier of the thread to a core thread identifier program by the kernel, and determining a core thread of the program based on the total time cost for executing the thread and the thread identifier of the thread by the core thread identifier program.
    Type: Application
    Filed: September 8, 2022
    Publication date: December 18, 2025
    Inventors: Yang LV, Zhuo FU, Sheng FANG
  • Patent number: 12494238
    Abstract: A circuit includes a first two-state device, a second two-state device and a third two-state device, each two-state device having a first resistance in a first state and a second resistance in a second state. First control elements are configured to apply a first voltage to the first two-state device to stochastically place the first two-state device in either the first state or the second state. Second control elements are configured to apply a second voltage to the second two-state device to stochastically place the second two-state device in either the first state or the second state. Third control elements are configured to send respective currents through the first two-state device and the second two-state device so as to place the third two-state device in either the first state or the second state based on the state of the first two-state device and the state of the second two-state devices.
    Type: Grant
    Filed: August 23, 2023
    Date of Patent: December 9, 2025
    Assignee: Regents of the University of Minnesota
    Inventors: Jian-Ping Wang, Brandon Zink, Yang Lv
  • Publication number: 20250313526
    Abstract: Disclosed are a pyrethroid compound containing a cyano group and a double bond, a synthesis method therefor and an application thereof. In the synthesis method, t-butyl 3-formyl-2,2-dimethyl-cyclopropanoate and cyanomethyl phosphonate are used as raw materials, undergo Witting-Horner reaction, undergo column chromatography to obtain t-butyl (Z)-3-(2-cyanovinyl)-2,2-dimethyl-cyclopropanoate ester, undergo deprotection to obtain (Z)-3-(2-cyanovinyl)-2,2-dimethyl-cyclopropanoic acid, undergo acyl chlorination reaction to produce (Z)-3-(2-cyanovinyl)-2,2-dimethyl-cyclopropanoyl chloride, and are esterified with corresponding alcohol to obtain the pyrethroid compound. The compound can be used as an insecticide against pests such as mosquitoes, flies, German cockroaches and the like.
    Type: Application
    Filed: January 19, 2023
    Publication date: October 9, 2025
    Inventors: Xiaoju Wu, Youfa Jiang, Baolin Wang, Chengmei Huang, Wei Jia, Yang LV
  • Publication number: 20250280640
    Abstract: A driving backplane includes a first substrate, a thick copper layer, a second substrate, and a driving layer stacked in sequence. The thick copper layer is provided with a driving wire configured to load a driving signal. The driving layer is provided with a driving circuit. The driving circuit is electrically connected to the driving wire through a via.
    Type: Application
    Filed: March 31, 2023
    Publication date: September 4, 2025
    Inventors: Xue DONG, Feng GUAN, Guangcai YUAN, Ce NING, Minghua XUAN, Haoliang ZHENG, Fei WANG, Jianhua DU, Yang LV, Chaolu WANG
  • Publication number: 20250248191
    Abstract: A stamp includes a substrate; position limiting structures located on a side of the substrate and spaced apart from each other; and transfer structures, which are located on the side of the substrate where the position limiting structures are located, and are spaced apart from each other. The position limiting structures are in one-to-one correspondence with the transfer structures. Each position limiting structure surrounds a periphery of a corresponding transfer structure, and an orthogonal projection of the position limiting structure on the substrate does not overlap with an orthogonal projection of the corresponding transfer structure on the substrate. A distance between an end surface of an end, which is distal to the substrate, of each transfer structure and the substrate is greater than a distance between an end surface of an end, which is distal to the substrate, of a corresponding position limiting structure and the substrate.
    Type: Application
    Filed: August 30, 2023
    Publication date: July 31, 2025
    Inventors: Shulei LI, Menghua ZHAO, Miaomiao JIA, Ying ZHOU, Yuanyuan MA, Zhao KANG, Yang LV, Ming YANG
  • Publication number: 20250139852
    Abstract: The disclosure relates to a system and method for image reconstruction. The method may include the steps of: obtaining raw data corresponding to radiation rays within a volume, determining a radiation ray passing a plurality of voxels, grouping the voxels into a plurality of subsets such that at least some subset of voxels are sequentially loaded into a memory, and performing a calculation relating to the sequentially loaded voxels. The radiation ray may be determined based on the raw data. The calculation may be performed by a plurality of processing threads in a parallel hardware architecture. A processing thread may correspond to a subset of voxels.
    Type: Application
    Filed: December 30, 2024
    Publication date: May 1, 2025
    Applicant: SHANGHAI UNITED IMAGING HEALTHCARE CO., LTD.
    Inventors: Yang LV, Yu DING