Patents by Inventor Yangda Zhang

Yangda Zhang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11195854
    Abstract: Some embodiments include an integrated structure having a first opening extending through a stack of alternating insulative levels and conductive levels. A nitride structure is within the first opening and narrows the first opening to form a second opening. Detectable oxide is between the nitride structure and one or more of the conductive levels. Some embodiments include an integrated structure having a conductive material, a select device gate material over the conductive material, and vertically-stacked conductive levels over the select device gate material. A first opening extends through the vertically-stacked levels to the conductive material and has opposing sidewalls along a cross-section. Nitride liners are along the sidewalls of the first opening. Detectable oxide is between at least one of the nitride liners and one or more of the vertically-stacked conductive levels. Some embodiments include methods for forming integrated structures.
    Type: Grant
    Filed: February 6, 2020
    Date of Patent: December 7, 2021
    Assignee: Micron Technology, Inc.
    Inventors: Jie Li, James Mathew, Kunal Shrotri, Luan C. Tran, Gordon A. Haller, Yangda Zhang, Hongpeng Yu, Minsoo Lee
  • Publication number: 20200176471
    Abstract: Some embodiments include an integrated structure having a first opening extending through a stack of alternating insulative levels and conductive levels. A nitride structure is within the first opening and narrows the first opening to form a second opening. Detectable oxide is between the nitride structure and one or more of the conductive levels. Some embodiments include an integrated structure having a conductive material, a select device gate material over the conductive material, and vertically-stacked conductive levels over the select device gate material. A first opening extends through the vertically-stacked levels to the conductive material and has opposing sidewalls along a cross-section. Nitride liners are along the sidewalls of the first opening. Detectable oxide is between at least one of the nitride liners and one or more of the vertically-stacked conductive levels. Some embodiments include methods for forming integrated structures.
    Type: Application
    Filed: February 6, 2020
    Publication date: June 4, 2020
    Applicant: Micron Technology, Inc.
    Inventors: Jie Li, James Mathew, Kunal Shrotri, Luan C. Tran, Gordon A. Haller, Yangda Zhang, Hongpeng Yu, Minsoo Lee
  • Patent number: 10580792
    Abstract: Some embodiments include an integrated structure having a first opening extending through a stack of alternating insulative levels and conductive levels. A nitride structure is within the first opening and narrows the first opening to form a second opening. Detectable oxide is between the nitride structure and one or more of the conductive levels. Some embodiments include an integrated structure having a conductive material, a select device gate material over the conductive material, and vertically-stacked conductive levels over the select device gate material. A first opening extends through the vertically-stacked levels to the conductive material and has opposing sidewalls along a cross-section. Nitride liners are along the sidewalls of the first opening. Detectable oxide is between at least one of the nitride liners and one or more of the vertically-stacked conductive levels. Some embodiments include methods for forming integrated structures.
    Type: Grant
    Filed: August 21, 2018
    Date of Patent: March 3, 2020
    Assignee: Micron Technology, Inc.
    Inventors: Jie Li, James Mathew, Kunal Shrotri, Luan C. Tran, Gordon A. Haller, Yangda Zhang, Hongpeng Yu, Minsoo Lee
  • Publication number: 20180358378
    Abstract: Some embodiments include an integrated structure having a first opening extending through a stack of alternating insulative levels and conductive levels. A nitride structure is within the first opening and narrows the first opening to form a second opening. Detectable oxide is between the nitride structure and one or more of the conductive levels. Some embodiments include an integrated structure having a conductive material, a select device gate material over the conductive material, and vertically-stacked conductive levels over the select device gate material. A first opening extends through the vertically-stacked levels to the conductive material and has opposing sidewalls along a cross-section. Nitride liners are along the sidewalls of the first opening. Detectable oxide is between at least one of the nitride liners and one or more of the vertically-stacked conductive levels. Some embodiments include methods for forming integrated structures.
    Type: Application
    Filed: August 21, 2018
    Publication date: December 13, 2018
    Applicant: Micron Technology, Inc.
    Inventors: Jie Li, James Mathew, Kunal Shrotri, Luan C. Tran, Gordon A. Haller, Yangda Zhang, Hongpeng Yu, Minsoo Lee
  • Patent number: 10083984
    Abstract: Some embodiments include an integrated structure having a first opening extending through a stack of alternating insulative levels and conductive levels. A nitride structure is within the first opening and narrows the first opening to form a second opening. Detectable oxide is between the nitride structure and one or more of the conductive levels. Some embodiments include an integrated structure having a conductive material, a select device gate material over the conductive material, and vertically-stacked conductive levels over the select device gate material. A first opening extends through the vertically-stacked levels to the conductive material and has opposing sidewalls along a cross-section. Nitride liners are along the sidewalls of the first opening. Detectable oxide is between at least one of the nitride liners and one or more of the vertically-stacked conductive levels. Some embodiments include methods for forming integrated structures.
    Type: Grant
    Filed: August 17, 2017
    Date of Patent: September 25, 2018
    Assignee: Micron Technology, Inc.
    Inventors: Jie Li, James Mathew, Kunal Shrotri, Luan C. Tran, Gordon A. Haller, Yangda Zhang, Hongpeng Yu, Minsoo Lee
  • Publication number: 20170365617
    Abstract: Some embodiments include an integrated structure having a first opening extending through a stack of alternating insulative levels and conductive levels. A nitride structure is within the first opening and narrows the first opening to form a second opening. Detectable oxide is between the nitride structure and one or more of the conductive levels. Some embodiments include an integrated structure having a conductive material, a select device gate material over the conductive material, and vertically-stacked conductive levels over the select device gate material. A first opening extends through the vertically-stacked levels to the conductive material and has opposing sidewalls along a cross-section. Nitride liners are along the sidewalls of the first opening. Detectable oxide is between at least one of the nitride liners and one or more of the vertically-stacked conductive levels. Some embodiments include methods for forming integrated structures.
    Type: Application
    Filed: August 17, 2017
    Publication date: December 21, 2017
    Inventors: Jie Li, James Mathew, Kunal Shrotri, Luan C. Tran, Gordon A. Haller, Yangda Zhang, Hongpeng Yu, Minsoo Lee
  • Patent number: 9773805
    Abstract: Some embodiments include an integrated structure having a first opening extending through a stack of alternating insulative levels and conductive levels. A nitride structure is within the first opening and narrows the first opening to form a second opening. Detectable oxide is between the nitride structure and one or more of the conductive levels. Some embodiments include an integrated structure having a conductive material, a select device gate material over the conductive material, and vertically-stacked conductive levels over the select device gate material. A first opening extends through the vertically-stacked levels to the conductive material and has opposing sidewalls along a cross-section. Nitride liners are along the sidewalls of the first opening. Detectable oxide is between at least one of the nitride liners and one or more of the vertically-stacked conductive levels. Some embodiments include methods for forming integrated structures.
    Type: Grant
    Filed: June 20, 2016
    Date of Patent: September 26, 2017
    Assignee: Micron Technology, Inc.
    Inventors: Jie Li, James Mathew, Kunal Shrotri, Luan C. Tran, Gordon A. Haller, Yangda Zhang, Hongpeng Yu, Minsoo Lee