Patents by Inventor Yang Gyoo Jung
Yang Gyoo Jung has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240069629Abstract: A system and method for laser assisted bonding of semiconductor die. As non-limiting examples, various aspects of this disclosure provide systems and methods that enhance or control laser irradiation of a semiconductor die, for example spatially and/or temporally, to improve bonding of the semiconductor die to a substrate.Type: ApplicationFiled: August 28, 2023Publication date: February 29, 2024Inventors: Tae Ho Yoon, Yang Gyoo Jung, Min Ho Kim, Youn Seok Song, Dong Soo Ryu, Choong Hoe Kim
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Patent number: 11742216Abstract: A system and method for laser assisted bonding of semiconductor die. As non-limiting examples, various aspects of this disclosure provide systems and methods that enhance or control laser irradiation of a semiconductor die, for example spatially and/or temporally, to improve bonding of the semiconductor die to a substrate.Type: GrantFiled: August 27, 2020Date of Patent: August 29, 2023Assignee: Amkor Technology Singapore Holding Pte. Ltd.Inventors: Tae Ho Yoon, Yang Gyoo Jung, Min Ho Kim, Youn Seok Song, Dong Soo Ryu, Choong Hoe Kim
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Patent number: 11664331Abstract: A semiconductor package is provided. The semiconductor package comprises a first substrate, a second substrate disposed on the first substrate, a first semiconductor chip disposed on the second substrate, and a stiffener extending from an upper surface of the first substrate to an upper surface of the second substrate, the stiffener not being in contact with the first semiconductor chip, wherein a first height from the upper surface of the first substrate to an upper surface of the first semiconductor chip is greater than a second height from the upper surface of the first substrate to an uppermost surface of the stiffener.Type: GrantFiled: September 3, 2021Date of Patent: May 30, 2023Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Chul Woo Kim, Sang Min Yong, Yang Gyoo Jung
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Patent number: 11217503Abstract: A semiconductor package includes a substrate and an interposer disposed on the substrate. The interposer comprises a first surface facing the substrate and a second surface facing away from the substrate. A first logic semiconductor chip is disposed on the first surface of the interposer and is spaced apart from the substrate in a first direction orthogonal to an upper surface of the substrate. A first memory package is disposed on the second surface of the interposer. A second memory package is disposed on the second surface of the interposer and is spaced apart from the first memory package in a second direction that is parallel to the upper surface of the substrate. A first heat transfer unit is disposed on a surface of the substrate facing the first logic semiconductor chip. The first heat transfer unit is spaced apart from the first logic semiconductor chip in the first direction.Type: GrantFiled: January 21, 2020Date of Patent: January 4, 2022Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Yang Gyoo Jung, Chul Woo Kim, Hyo-Chang Ryu, Seung-Kwan Ryu, Yun Seok Choi
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Publication number: 20210398916Abstract: A semiconductor package is provided. The semiconductor package comprises a first substrate, a second substrate disposed on the first substrate, a first semiconductor chip disposed on the second substrate, and a stiffener extending from an upper surface of the first substrate to an upper surface of the second substrate, the stiffener not being in contact with the first semiconductor chip, wherein a first height from the upper surface of the first substrate to an upper surface of the first semiconductor chip is greater than a second height from the upper surface of the first substrate to an uppermost surface of the stiffener.Type: ApplicationFiled: September 3, 2021Publication date: December 23, 2021Inventors: Chul Woo KIM, Sang Min YONG, Yang Gyoo JUNG
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Patent number: 11139253Abstract: A semiconductor package is provided. The semiconductor package comprises a first substrate, a second substrate disposed on the first substrate, a first semiconductor chip disposed on the second substrate, and a stiffener extending from an upper surface of the first substrate to an upper surface of the second substrate, the stiffener not being in contact with the first semiconductor chip, wherein a first height from the upper surface of the first substrate to an upper surface of the first semiconductor chip is greater than a second height from the upper surface of the first substrate to an uppermost surface of the stiffener.Type: GrantFiled: September 26, 2019Date of Patent: October 5, 2021Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Chui Woo Kim, Sang Min Yong, Yang Gyoo Jung
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Publication number: 20210082717Abstract: A system and method for laser assisted bonding of semiconductor die. As non-limiting examples, various aspects of this disclosure provide systems and methods that enhance or control laser irradiation of a semiconductor die, for example spatially and/or temporally, to improve bonding of the semiconductor die to a substrate.Type: ApplicationFiled: August 27, 2020Publication date: March 18, 2021Inventors: Tae Ho Yoon, Yang Gyoo Jung, Min Ho Kim, Youn Seok Song, Dong Soo Ryu, Choong Hoe Kim
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Publication number: 20200395346Abstract: A semiconductor package includes a substrate and an interposer disposed on the substrate. The interposer comprises a first surface facing the substrate and a second surface facing away from the substrate. A first logic semiconductor chip is disposed on the first surface of the interposer and is spaced apart from the substrate in a first direction orthogonal to an upper surface of the substrate. A first memory package is disposed on the second surface of the interposer. A second memory package is disposed on the second surface of the interposer and is spaced apart from the first memory package in a second direction that is parallel to the upper surface of the substrate. A first heat transfer unit is disposed on a surface of the substrate facing the first logic semiconductor chip. The first heat transfer unit is spaced apart from the first logic semiconductor chip in the first direction.Type: ApplicationFiled: January 21, 2020Publication date: December 17, 2020Inventors: Yang Gyoo JUNG, Chul Woo KIM, Hyo-Chang RYU, Seung-Kwan RYU, Yun Seok CHOI
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Publication number: 20200312789Abstract: A semiconductor package is provided. The semiconductor package comprises a first substrate, a second substrate disposed on the first substrate, a first semiconductor chip disposed on the second substrate, and a stiffener extending from an upper surface of the first substrate to an upper surface of the second substrate, the stiffener not being in contact with the first semiconductor chip, wherein a first height from the upper surface of the first substrate to an upper surface of the first semiconductor chip is greater than a second height from the upper surface of the first substrate to an uppermost surface of the stiffener.Type: ApplicationFiled: September 26, 2019Publication date: October 1, 2020Inventors: Chul Woo KIM, Sang Min YONG, Yang Gyoo JUNG
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Patent number: 10763129Abstract: A system and method for laser assisted bonding of semiconductor die. As non-limiting examples, various aspects of this disclosure provide systems and methods that enhance or control laser irradiation of a semiconductor die, for example spatially and/or temporally, to improve bonding of the semiconductor die to a substrate.Type: GrantFiled: May 28, 2019Date of Patent: September 1, 2020Assignee: Amkor Technology, Inc.Inventors: Tae Ho Yoon, Yang Gyoo Jung, Min Ho Kim, Youn Seok Song, Dong Soo Ryu, Choong Hoe Kim
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Publication number: 20190287816Abstract: A system and method for laser assisted bonding of semiconductor die. As non-limiting examples, various aspects of this disclosure provide systems and methods that enhance or control laser irradiation of a semiconductor die, for example spatially and/or temporally, to improve bonding of the semiconductor die to a substrate.Type: ApplicationFiled: May 28, 2019Publication date: September 19, 2019Inventors: Tae Ho Yoon, Yang Gyoo Jung, Min Ho Kim, Youn Seok Song, Dong Soo Ryu, Choong Hoe Kim
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Patent number: 10304698Abstract: A system and method for laser assisted bonding of semiconductor die. As non-limiting examples, various aspects of this disclosure provide systems and methods that enhance or control laser irradiation of a semiconductor die, for example spatially and/or temporally, to improve bonding of the semiconductor die to a substrate.Type: GrantFiled: March 13, 2018Date of Patent: May 28, 2019Assignee: Amkor Technology, Inc.Inventors: Tae Ho Yoon, Yang Gyoo Jung, Min Ho Kim, Youn Seok Song, Dong Soo Ryu, Choong Hoe Kim
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Publication number: 20180204740Abstract: A system and method for laser assisted bonding of semiconductor die. As non-limiting examples, various aspects of this disclosure provide systems and methods that enhance or control laser irradiation of a semiconductor die, for example spatially and/or temporally, to improve bonding of the semiconductor die to a substrate.Type: ApplicationFiled: March 13, 2018Publication date: July 19, 2018Inventors: Tae Ho Yoon, Yang Gyoo Jung, Min Ho Kim, Youn Seok Song, Dong Soo Ryu, Choong Hoe Kim
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Patent number: 9916989Abstract: A system and method for laser assisted bonding of semiconductor die. As non-limiting examples, various aspects of this disclosure provide systems and methods that enhance or control laser irradiation of a semiconductor die, for example spatially and/or temporally, to improve bonding of the semiconductor die to a substrate.Type: GrantFiled: April 15, 2016Date of Patent: March 13, 2018Assignee: AMKOR TECHNOLOGY, INC.Inventors: Tae Ho Yoon, Yang Gyoo Jung, Min Ho Kim, Youn Seok Song, Dong Soo Ryu, Choong Hoe Kim
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Publication number: 20170301560Abstract: A system and method for laser assisted bonding of semiconductor die. As non-limiting examples, various aspects of this disclosure provide systems and methods that enhance or control laser irradiation of a semiconductor die, for example spatially and/or temporally, to improve bonding of the semiconductor die to a substrate.Type: ApplicationFiled: April 15, 2016Publication date: October 19, 2017Inventors: Tae Ho Yoon, Yang Gyoo Jung, Min Ho Kim, Youn Seok Song, Dong Soo Ryu, Choong Hoe Kim
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Patent number: 9627348Abstract: Laser assisted bonding for semiconductor die interconnections is disclosed and may, for example, include forming flux on a circuit pattern on a circuit board, placing a semiconductor die on the circuit board where a bump on the semiconductor die contacts the flux, and reflowing the bump by directing a laser beam toward the semiconductor die. The laser beam may volatize the flux and make an electrical connection between the bump and the circuit pattern. A jig plate may be placed on the semiconductor die when the laser beam is directed toward the semiconductor die. Warpage may be reduced during heating or cooling of the semiconductor die by applying pressure to the jig plate. Jig bars may extend outward from the jig plate and may be in contact with the circuit board during the application of pressure to the jig plate. The jig plate may comprise one or more of: silicon, silicon carbide, and glass.Type: GrantFiled: January 8, 2015Date of Patent: April 18, 2017Assignee: AMKOR TECHNOLOGY, INC.Inventors: Dong Su Ryu, Choon Heung Lee, Min Ho Kim, Choong Hoe Kim, Ju Hoon Yoon, Chan Ha Hwang, Yang Gyoo Jung
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Publication number: 20160049381Abstract: Laser assisted bonding for semiconductor die interconnections is disclosed and may, for example, include forming flux on a circuit pattern on a circuit board, placing a semiconductor die on the circuit board where a bump on the semiconductor die contacts the flux, and reflowing the bump by directing a laser beam toward the semiconductor die. The laser beam may volatize the flux and make an electrical connection between the bump and the circuit pattern. A jig plate may be placed on the semiconductor die when the laser beam is directed toward the semiconductor die. Warpage may be reduced during heating or cooling of the semiconductor die by applying pressure to the jig plate. Jig bars may extend outward from the jig plate and may be in contact with the circuit board during the application of pressure to the jig plate. The jig plate may comprise one or more of: silicon, silicon carbide, and glass.Type: ApplicationFiled: January 8, 2015Publication date: February 18, 2016Inventors: Dong Su Ryu, Choon Heung Lee, Min Ho Kim, Choong Hoe Kim, Ju Hoon Yoon, Chan Ha Hwang, Yang Gyoo Jung