Patents by Inventor Yang-hee Lee
Yang-hee Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Patent number: 11973033Abstract: A flip-chip semiconductor-on-insulator die includes a substrate layer, an active layer, an insulator layer between the substrate layer and the active layer, a first metal layer, and a first via layer between the active layer and the first metal layer. The die at least first and second contact pads and a transistor including a first terminal formed within the active layer. A first portion of the first terminal falls within a footprint of the first contact pad and a second portion of the first terminal falls within a footprint of the second contact pad.Type: GrantFiled: December 30, 2020Date of Patent: April 30, 2024Assignee: Skyworks Solutions, Inc.Inventors: Yang Liu, Yong Hee Lee, Thomas Obkircher
-
Patent number: 11968990Abstract: The present application relates to creamer comprising vegetable lipids, casein, maltose, phosphates, and allulose.Type: GrantFiled: March 8, 2022Date of Patent: April 30, 2024Assignee: CJ CHEILJEDANG CORPORATIONInventors: Young Mi Lee, Seong Bo Kim, Yang Hee Kim, Seong Jun Cho, Myung Sook Choi, Young Ji Han, Ji Young Choi, Su Jung Cho, Un Ju Jung, Eun Young Kwon
-
Publication number: 20240132657Abstract: A curable composition or a thermal interface material exhibiting low adhesion force to a predetermined adherend while having a low density as well as exhibiting a high thermal conductivity is provided. It also has excellent flame retardant properties, and exhibits ejection properties and thixotropy suitable for processes in a state where halogen flame retardants or phosphorus-based flame retardants are not used, or the use ratio thereof is minimized.Type: ApplicationFiled: September 20, 2022Publication date: April 25, 2024Applicant: LG Chem, Ltd.Inventors: Do Yeon Kim, Ho Yeon Son, Yang Gu Kang, Shin Hee Jun, Ha Na Lee, Jeong Hyun Lee
-
Patent number: 10943908Abstract: A method of forming a semiconductor device includes forming a mold structure on a substrate, forming a first mask layer having a deposition thickness on the mold structure and patterning the first mask layer to form first mask openings which expose the mold structure. The mold structure is etched to form holes that penetrate the mold structure. The first mask layer is thinned to form mask portions having thickness smaller than the deposition thickness. Conductive patterns are formed to fill the holes and the first mask openings. The first mask layer including the mask portions is etched to expose the mold structure. The conductive patterns include protrusions. A chemical mechanical polishing process is performed to remove the protrusions of the conductive patterns.Type: GrantFiled: May 14, 2019Date of Patent: March 9, 2021Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Jin Woo Bae, Su Young Shin, Young Ho Koh, Bo Un Yoon, Il Young Yoon, Yang Hee Lee, Hee Sook Cheon
-
Publication number: 20200098763Abstract: A method of forming a semiconductor device includes forming a mold structure on a substrate, forming a first mask layer having a deposition thickness on the mold structure and patterning the first mask layer to form first mask openings which expose the mold structure. The mold structure is etched to form holes that penetrate the mold structure. The first mask layer is thinned to form mask portions having thickness smaller than the deposition thickness. Conductive patterns are formed to fill the holes and the first mask openings. The first mask layer including the mask portions is etched to expose the mold structure. The conductive patterns include protrusions. A chemical mechanical polishing process is performed to remove the protrusions of the conductive patterns.Type: ApplicationFiled: May 14, 2019Publication date: March 26, 2020Inventors: JIN WOO BAE, Su Young SHIN, Young Ho KOH, Bo Un YOON, II Young YOON, Yang Hee LEE, Hee Sook CHEON
-
Publication number: 20190341358Abstract: A method of forming a semiconductor device, includes: forming a design pattern on a substrate, wherein the design pattern protrudes from the substrate; forming a filling layer on the substrate, wherein the filling layer at least partially covers the design pattern; forming a polishing resistance pattern adjacent to the design pattern in the filling layer using a laser irradiation process and/or an ion implantation process; and removing the filling layer using a chemical mechanical polishing (CMP) process to expose the design pattern.Type: ApplicationFiled: January 21, 2019Publication date: November 7, 2019Inventors: YANG HEE LEE, Jong Hyuk Park, Jin Woo Bae, Choong Seob Shin, Hyo Jin Oh, Bo Un Yoon, Il Young Yoon, Hee Sook Cheon
-
Publication number: 20180362806Abstract: Provided are a chemical mechanical polishing (CMP) slurry composition and a method of fabricating a semiconductor device using the same. The chemical mechanical polishing (CMP) slurry composition includes abrasive particles, a first cationic compound which comprises at least any one of an amino acid, a polyalkylene glycol, a polymer polysaccharide to which a glucosamine compound is bonded, and a polymer containing an amine group, a second cationic compound which comprises an organic acid, and a nonionic compound which comprises polyetheramine.Type: ApplicationFiled: November 25, 2017Publication date: December 20, 2018Inventors: Seung Ho PARK, Chang Gil Kwon, Sung Pyo LEE, Jun Ha HWANG, Sang Kyun KIM, Hye Sung PARK, Su Young SHIN, Woo In LEE, Yang Hee LEE, Jong Hyuk PARK, Il Young YOON
-
Patent number: 10109529Abstract: A semiconductor device including a direct contact and a bit line in a cell array region and a gate electrode structure in a peripheral circuit region, and a method of manufacturing the semiconductor device are provided. The semiconductor device includes a substrate including a cell array region including a first active region and a peripheral circuit region including a second active region, a first insulating layer on the substrate, the first insulating layer including contact holes exposing the first active region, a direct contact in the contact holes, wherein a direct contact is connected to the first active region, a bit line connected to the direct contact in the cell array region and extending in a first direction, and a gate insulating layer and a gate electrode structure, wherein a dummy conductive layer including substantially the same material as the direct contact is in the peripheral circuit region.Type: GrantFiled: June 17, 2016Date of Patent: October 23, 2018Assignee: Samsung Electronics Co., Ltd.Inventors: Young-ho Koh, Byoung-ho Kwon, Yang-hee Lee, Young-kuk Kim, In-seak Hwang, Bo-un Yoon
-
Publication number: 20170084710Abstract: A semiconductor device including a direct contact and a bit line in a cell array region and a gate electrode structure in a peripheral circuit region, and a method of manufacturing the semiconductor device are provided. The semiconductor device includes a substrate including a cell array region including a first active region and a peripheral circuit region including a second active region, a first insulating layer on the substrate, the first insulating layer including contact holes exposing the first active region, a direct contact in the contact holes, wherein a direct contact is connected to the first active region, a bit line connected to the direct contact in the cell array region and extending in a first direction, and a gate insulating layer and a gate electrode structure, wherein a dummy conductive layer including substantially the same material as the direct contact is in the peripheral circuit region.Type: ApplicationFiled: June 17, 2016Publication date: March 23, 2017Applicant: Samsung Electronics Co., Ltd.Inventors: Young-ho Koh, Byoung-ho Kwon, Yang-hee Lee, Young-kuk Kim, In-seak Hwang, Bo-un Yoon
-
Patent number: 6162460Abstract: Disclosed is a poultice capable of rapidly curing an affected part of a patient's body and of enhancing a curative value by increasing an infiltration efficiency of medicine into a hypodermic tissue of the affected part with the aid of a low-frequency electro therapy. Both surfaces of compress sheets of the poultice are coated with predetermined skin-adhesive medicines adapted to cure an affected part of a patient's body. A thin film is attached to lower surfaces of the compress sheets. The thin film can be detached from the lower surfaces of the compress sheets during use of the poultice. An attaching sheet for attaching the poultice to the affected part of the patient's body is located on upper surfaces of the compress sheets. A pair of conductive layers are coated on a lower surface of the attaching sheet, which is opposite to the upper surfaces of the compress sheets. A low-frequency oscillator for applying a low-frequency energy into the compress sheets is installed between the conductive layers.Type: GrantFiled: March 10, 1998Date of Patent: December 19, 2000Inventor: Yang-Hee Lee
-
Patent number: 5976739Abstract: A method of developing a screen of a cathode ray tube includes the steps of establishing an uniform electrostatic charge on selected areas of an inner surface of a panel with a predetermined pattern, rotating a nozzle to a predetermined angle with respect to the inner surface of a panel, and moving the rotated nozzle backwards and forwards while spraying a dry-powdered and electrically charged screen structure material on the selected areas of the inner surface of the panel.Type: GrantFiled: January 30, 1998Date of Patent: November 2, 1999Assignee: Samsung Display Devices Co., Ltd.Inventors: Yang-hee Lee, Chae-bok Lim, Jong-ho Cho