Abstract: A display substrate is provided to include: a base substrate including a display area and a peripheral area surrounding the display area; pixel units in array are in the display area; a driving module is in the peripheral area and is configured to provide electrical signals for the pixel units, to control the pixel units to operate; the driving module includes driving circuits each provided with a corresponding operating signal line group in the peripheral area; the signal line group includes at least two operating signal lines connected to the corresponding driving circuit, to provide electrical signals thereto; the at least two operating signal lines include first and second clock signal lines; the first clock signal lines for at least two driving circuits are a same first clock signal line; and/or the second clock signal lines for the at least two driving circuits are a same second clock signal line.

Abstract: Provided are a display apparatus, a display panel and a display baseplate. The display baseplate includes: a substrate (2); a light-blocking layer (11) on the substrate (2), and including light-transmitting holes (10); a first light-adjusting layer (7) at a side of the light-blocking layer (11); and first light-focusing bodies (8) at a surface of the first light-adjusting layer (7) away from the light-blocking layer (11), where a refractive index of the first light-adjusting layer (7) is different from a refractive index of each of the first light-focusing bodies (8). In this way, use effect can be improved.

Abstract: A display substrate is provided to include: a base substrate including a display area and a peripheral area surrounding the display area; pixel units in array are in the display area; a driving module is in the peripheral area and is configured to provide electrical signals for the pixel units, to control the pixel units to operate; the driving module includes driving circuits each provided with a corresponding operating signal line group in the peripheral area; the signal line group includes at least two operating signal lines connected to the corresponding driving circuit, to provide electrical signals thereto; the at least two operating signal lines include first and second clock signal lines; the first clock signal lines for at least two driving circuits are a same first clock signal line; and/or the second clock signal lines for the at least two driving circuits are a same second clock signal line.

Abstract: Disclosed are a display substrate, a preparation method therefor and a display apparatus. The display substrate includes a shielding conductive layer and a functional structure layer, wherein the shielding conductive layer at least includes a first connection line, and the functional structure layer at least includes a data signal line and a second connection line; in a plane parallel to the display substrate, the display substrate includes a plurality of circuit units forming a plurality of unit rows and a plurality of unit columns, at least one circuit unit includes a pixel driving circuit, the data signal line is connected to a plurality of pixel driving circuits of one unit column, the data signal line is configured to provide a data signal to the pixel driving circuit; the second connection line is connected with the first connection line, and the data signal line is connected with the second connection line.

Abstract: A display substrate is provided to include: a base substrate including a display area and a peripheral area surrounding the display area; pixel units in array are in the display area; a driving module is in the peripheral area and is configured to provide electrical signals for the pixel units, to control the pixel units to operate; the driving module includes driving circuits each provided with a corresponding operating signal line group in the peripheral area; the signal line group includes at least two operating signal lines connected to the corresponding driving circuit, to provide electrical signals thereto; the at least two operating signal lines include first and second clock signal lines; the first clock signal lines for at least two driving circuits are a same first clock signal line; and/or the second clock signal lines for the at least two driving circuits are a same second clock signal line.