Patents by Inventor Yan-Hong Lu

Yan-Hong Lu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9898288
    Abstract: A computer-implemented method of executing an instruction sequence with a recursive function call of a plurality of threads within a thread group in a Single-Instruction-Multiple-Threads (SIMT) system is provided. Each thread is provided with a function call counter (FCC), an active mask, an execution mask and a per-thread program counter (PTPC). The instruction sequence with the recursive function call is executed by the threads in the thread group according to a program counter (PC) indicating a target. Upon executing the recursive function call, for each thread, the active mask is set according to the PTPC and the target indicated by the PC, the FCC is determined when entering or returning from the recursive function call, the execution mask is determined according to the FCC and the active mask. It is determined whether an execution result of the recursive function call takes effects according to the execution mask.
    Type: Grant
    Filed: December 29, 2015
    Date of Patent: February 20, 2018
    Assignee: MEDIATEK INC.
    Inventors: Yan-Hong Lu, Jia-Yang Chang, Pao-Hung Kuo, Chia-Chi Chang, Pei-Kuei Tsung
  • Patent number: 9786098
    Abstract: A rendering method executed by a graphics processing unit includes: loading a vertex shading command from a first command queue to a shader module; executing the vertex shading command for computing the varying of the vertices to perform a vertex shading operation by taking the vertices as first input data; storing first tessellation stage commands into a second command queue; loading the first tessellation stage commands to the shader module; and executing the first tessellation commands for computing first tessellation stage outputs to perform a first tessellation stage of the one or more tessellation stages by taking the varying of the vertices as second input data. The vertex shading command is stored into the first command queue by a first processing unit. The varying of the vertices and the first tessellation stage outputs are stored in a cache of the graphics processing unit.
    Type: Grant
    Filed: July 6, 2015
    Date of Patent: October 10, 2017
    Assignee: MEDIATEK INC.
    Inventors: Pei-Kuei Tsung, Shou-Jen Lai, Yan-Hong Lu, Sung-Fang Tsai, Chien-Ping Lu
  • Patent number: 9760969
    Abstract: A graphic processing system and a method of graphic processing are provided. The graphic processing system has a collector, a plurality of slots, a scheduler, an arbiter and at least an arithmetic logic unit (ALU). The collector is configured to group a plurality of workitems into elementary wavefronts. Each of the elementary wavefronts comprises workitems configured to execute the same kernel code. The scheduler is configured to allocate the elementary wavefronts to the slots. Two or more of the elementary wavefronts exist at one slot to form one of a plurality of macro wavefronts. The arbiter is configured to select one of the macro wavefronts. The ALU is configured to execute workitems of at least an elementary wavefront of the selected macro wavefront and output results of execution of the workitems.
    Type: Grant
    Filed: March 9, 2015
    Date of Patent: September 12, 2017
    Assignee: MEDIATEK INC.
    Inventors: Ming-Hao Liao, Shou-Jen Lai, Chia-Hsien Chou, Po-Chun Fan, Yan-Hong Lu, Chih-Chung Cheng, Hung-Yau Lin
  • Publication number: 20170185406
    Abstract: A computer-implemented method of executing an instruction sequence with a recursive function call of a plurality of threads within a thread group in a Single-Instruction-Multiple-Threads (SIMT) system is provided. Each thread is provided with a function call counter (FCC), an active mask, an execution mask and a per-thread program counter (PTPC). The instruction sequence with the recursive function call is executed by the threads in the thread group according to a program counter (PC) indicating a target. Upon executing the recursive function call, for each thread, the active mask is set according to the PTPC and the target indicated by the PC, the FCC is determined when entering or returning from the recursive function call, the execution mask is determined according to the FCC and the active mask. It is determined whether an execution result of the recursive function call takes effects according to the execution mask.
    Type: Application
    Filed: December 29, 2015
    Publication date: June 29, 2017
    Inventors: Yan-Hong LU, Jia-Yang CHANG, Pao-Hung KUO, Chia-Chi CHANG, Pei-Kuei TSUNG
  • Publication number: 20170011550
    Abstract: A rendering method executed by a graphics processing unit includes: loading a vertex shading command from a first command queue to a shader module; executing the vertex shading command for computing the varying of the vertices to perform a vertex shading operation by taking the vertices as first input data; storing first tessellation stage commands into a second command queue; loading the first tessellation stage commands to the shader module; and executing the first tessellation commands for computing first tessellation stage outputs to perform a first tessellation stage of the one or more tessellation stages by taking the varying of the vertices as second input data. The vertex shading command is stored into the first command queue by a first processing unit. The varying of the vertices and the first tessellation stage outputs are stored in a cache of the graphics processing unit.
    Type: Application
    Filed: July 6, 2015
    Publication date: January 12, 2017
    Inventors: Pei-Kuei TSUNG, Shou-Jen LAI, Yan-Hong LU, Sung-Fang TSAI, Chien-Ping LU
  • Publication number: 20160267621
    Abstract: A graphic processing system and a method of graphic processing are provided. The graphic processing system has a collector, a plurality of slots, a scheduler, an arbiter and at least an arithmetic logic unit (ALU). The collector is configured to group a plurality of workitems into elementary wavefronts. Each of the elementary wavefronts comprises workitems configured to execute the same kernel code. The scheduler is configured to allocate the elementary wavefronts to the slots. Two or more of the elementary wavefronts exist at one slot to form one of a plurality of macro wavefronts. The arbiter is configured to select one of the macro wavefronts. The ALU is configured to execute workitems of at least an elementary wavefront of the selected macro wavefront and output results of execution of the workitems.
    Type: Application
    Filed: March 9, 2015
    Publication date: September 15, 2016
    Inventors: Ming-Hao Liao, Shou-Jen Lai, Chia-Hsien Chou, Po-Chun Fan, Yan-Hong Lu, Chih-Chung Cheng, Hung-Yau Lin
  • Patent number: 8384724
    Abstract: A coordinating apparatus for coordinating data transmission between a data providing device and a display device is provided. The display device conforms to a transmission standard. The coordinating apparatus includes a programmable coordinating module and an outputting module. The programmable coordinating module is programmed according to the transmission standard. The programmable coordinating module is used for receiving M bits of image data from the data providing device, extracting N bits of image data among the M bits of image data, and arranging the N bits of image data into N bits of arranged data. The outputting module is used for outputting the N bits of arranged data to the display device.
    Type: Grant
    Filed: January 11, 2008
    Date of Patent: February 26, 2013
    Assignee: Quanta Computer Inc.
    Inventor: Yan-Hong Lu
  • Publication number: 20090058865
    Abstract: A coordinating apparatus for coordinating data transmission between a data providing device and a display device is provided. The display device conforms to a transmission standard. The coordinating apparatus includes a programmable coordinating module and an outputting module. The programmable coordinating module is programmed according to the transmission standard. The programmable coordinating module is used for receiving M bits of image data from the data providing device, extracting N bits of image data among the M bits of image data, and arranging the N bits of image data into N bits of arranged data. The outputting module is used for outputting the N bits of arranged data to the display device.
    Type: Application
    Filed: January 11, 2008
    Publication date: March 5, 2009
    Inventor: Yan-Hong Lu