Patents by Inventor Yaniv Frishman

Yaniv Frishman has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9749636
    Abstract: Systems, apparatus, articles, and methods are described below including operations for dynamic on screen display using a compressed video stream.
    Type: Grant
    Filed: June 15, 2015
    Date of Patent: August 29, 2017
    Assignee: Intel Corporation
    Inventor: Yaniv Frishman
  • Publication number: 20160309208
    Abstract: Examples are disclosed for transmitting video content. In some examples, cyclic redundancy check (CRC) values may be added to video content for video frames to be presented or displayed in a given region of a display. Results of CRC functions for consecutive video frames that use the added CRC values may be compared to determine whether the video content for the consecutive video frames is static video content. Video content for at least one of the consecutive video frames may be withheld from being transmitted if the video content for the consecutive video frames is characterized as static video content. Multiple CRC values or different CRC values may be added to further determine whether video content for the consecutive video frames or for subsequent consecutive video frames is also characterized as static video content. Other examples are described and claimed.
    Type: Application
    Filed: March 15, 2016
    Publication date: October 20, 2016
    Applicant: INTEL CORPORATION
    Inventors: Guoqing LI, Jeffrey R. FOERSTER, Yaniv FRISHMAN
  • Patent number: 9419972
    Abstract: Systems and methods are directed to a memory device that includes a plurality of memory buffers and a direct memory access (DMA) descriptor structure. The DMA descriptor structure comprises a transfer command and associated data transfer information and encryption/decryption information that is configured in a two dimensional, tree-linked structure. A DMA controller that is communicatively coupled to the memory device transfers data to/from the memory buffers and encrypts/decrypts the data based on the transfer command and data transfer information and encryption/decryption information provided by the two dimensional, tree-linked DMA descriptor structure.
    Type: Grant
    Filed: March 30, 2012
    Date of Patent: August 16, 2016
    Assignee: INTEL CORPORATION
    Inventors: Amihai Kidron, Yaniv Frishman
  • Publication number: 20160227257
    Abstract: Systems, apparatus, articles, and methods are described below including operations for replaying old packets for concealing video decoding errors as well as operations for video decoding latency adjustment based on wireless link conditions.
    Type: Application
    Filed: March 27, 2015
    Publication date: August 4, 2016
    Inventors: Yaniv Frishman, Moshe Naaman
  • Publication number: 20160227235
    Abstract: Systems, apparatus, articles, and methods are described below including operations for wireless bandwidth (BW) reduction in an encoder.
    Type: Application
    Filed: March 27, 2015
    Publication date: August 4, 2016
    Inventors: Yaniv Frishman, Etan Shirron
  • Publication number: 20160119624
    Abstract: Systems, apparatus, articles, and methods are described below including operations for dynamic on screen display using a compressed video stream.
    Type: Application
    Filed: June 15, 2015
    Publication date: April 28, 2016
    Inventor: YANIV FRISHMAN
  • Patent number: 9325452
    Abstract: Examples are disclosed for transmitting video content. In some examples, cyclic redundancy check (CRC) values may be added to video content for video frames to be presented or displayed in a given region of a display. Results of CRC functions for consecutive video frames that use the added CRC values may be compared to determine whether the video content for the consecutive video frames is static video content. Video content for at least one of the consecutive video frames may be withheld from being transmitted if the video content for the consecutive video frames is characterized as static video content. Multiple CRC values or different CRC values may be added to further determine whether video content for the consecutive video frames or for subsequent consecutive video frames is also characterized as static video content. Other examples are described and claimed.
    Type: Grant
    Filed: February 17, 2015
    Date of Patent: April 26, 2016
    Assignee: INTEL CORPORATION
    Inventors: Guoqing Li, Jeffrey R. Foerster, Yaniv Frishman
  • Publication number: 20160088300
    Abstract: Systems, apparatus and methods are described including operations for parallel coding for wireless displays.
    Type: Application
    Filed: December 12, 2014
    Publication date: March 24, 2016
    Inventor: YANIV FRISHMAN
  • Patent number: 9220099
    Abstract: Embodiments of wireless devices and methods to support a clock synchronization protocol that is provided independently and in parallel to multiple protocol abstraction level (PAL) and other upper layer entities and to multiple streams per each of the PAL and the upper layer entities. The frequency and time synchronization messages are delivered by MAC management action frames and can be aggregated in A-MPDU together with data, management and control MPDUs.
    Type: Grant
    Filed: December 27, 2012
    Date of Patent: December 22, 2015
    Assignee: INTEL CORPORATION
    Inventors: Solomon Trainin, Etan Shirron, Yaniv Frishman
  • Publication number: 20150195061
    Abstract: Examples are disclosed for transmitting video content. In some examples, cyclic redundancy check (CRC) values may be added to video content for video frames to be presented or displayed in a given region of a display. Results of CRC functions for consecutive video frames that use the added CRC values may be compared to determine whether the video content for the consecutive video frames is static video content. Video content for at least one of the consecutive video frames may be withheld from being transmitted if the video content for the consecutive video frames is characterized as static video content. Multiple CRC values or different CRC values may be added to further determine whether video content for the consecutive video frames or for subsequent consecutive video frames is also characterized as static video content. Other examples are described and claimed.
    Type: Application
    Filed: February 17, 2015
    Publication date: July 9, 2015
    Applicant: Intel Corporation
    Inventors: GUOQING LI, JEFFREY R. FOERSTER, YANIV FRISHMAN
  • Patent number: 8977945
    Abstract: Examples are disclosed for transmitting video content. In some examples, cyclic redundancy check (CRC) values may be added to video content for video frames to be presented or displayed in a given region of a display. Results of CRC functions for consecutive video frames that use the added CRC values may be compared to determine whether the video content for the consecutive video frames is static video content. Video content for at least one of the consecutive video frames may be withheld from being transmitted if the video content for the consecutive video frames is characterized as static video content. Multiple CRC values or different CRC values may be added to further determine whether video content for the consecutive video frames or for subsequent consecutive video frames is also characterized as static video content. Other examples are described and claimed.
    Type: Grant
    Filed: March 12, 2013
    Date of Patent: March 10, 2015
    Assignee: Intel Corporation
    Inventors: Guoqing Li, Jeffrey R. Foerster, Yaniv Frishman
  • Patent number: 8856842
    Abstract: In a wireless video system, the clock rate for wirelessly transmitting the video data from the transmitting device should be identical to the clock rate for receiving the video data at the receiving device. But the two devices have separate clocks, whose frequencies may drift apart over time, leading the video buffer to be over run or under run. Clock synchronizing messages to prevent this may be sent at short intervals when clock synchronization is first being acquired, and at larger intervals after clock synchronization has already been achieved and is merely being maintained.
    Type: Grant
    Filed: December 6, 2012
    Date of Patent: October 7, 2014
    Assignee: Intel Corporation
    Inventors: Guoqing C. Li, Etan Shirron, Yaniv Frishman, George R. Hayek
  • Publication number: 20140282753
    Abstract: Examples are disclosed for transmitting video content. In some examples, cyclic redundancy check (CRC) values may be added to video content for video frames to be presented or displayed in a given region of a display. Results of CRC functions for consecutive video frames that use the added CRC values may be compared to determine whether the video content for the consecutive video frames is static video content. Video content for at least one of the consecutive video frames may be withheld from being transmitted if the video content for the consecutive video frames is characterized as static video content. Multiple CRC values or different CRC values may be added to further determine whether video content for the consecutive video frames or for subsequent consecutive video frames is also characterized as static video content. Other examples are described and claimed.
    Type: Application
    Filed: March 12, 2013
    Publication date: September 18, 2014
    Inventors: GUOQING LI, JEFFREY R. FOERSTER, YANIV FRISHMAN
  • Publication number: 20140149743
    Abstract: Systems and methods are directed to a memory device that includes a plurality of memory buffers and a direct memory access (DMA) descriptor structure. The DMA descriptor structure comprises a transfer command and associated data transfer information and encryption/decryption information that is configured in a two dimensional, tree-linked structure. A DMA controller that is communicatively coupled to the memory device transfers data to/from the memory buffers and encrypts/decrypts the data based on the transfer command and data transfer information and encryption/decryption information provided by the two dimensional, tree-linked DMA descriptor structure.
    Type: Application
    Filed: March 30, 2012
    Publication date: May 29, 2014
    Inventors: Amihai Kidron, Yaniv Frishman
  • Publication number: 20140003494
    Abstract: Some demonstrative embodiments include devices, systems and/or methods of video encoding. For example, a device may include an encoding selector to control a block encoder to encode current video data of at least one pixel block of a current video frame, the encoding selector is to select between a first encoding mode causing the block encoder to encode the current video data into an encoded block to be provided to a decoder, and a second encoding mode allowing the block encoder to generate an indication to indicate to the decoder that the current video data is to be decoded using video data decoded from a previous video frame, wherein the encoding selector is to select between the first and second encoding modes without using previous video data of the pixel block of the previous video frame.
    Type: Application
    Filed: June 8, 2012
    Publication date: January 2, 2014
    Inventor: Yaniv Frishman
  • Publication number: 20130279467
    Abstract: Embodiments of wireless devices and methods to support a clock synchronization protocol that is provided independently and in parallel to multiple protocol abstraction level (PAL) and other upper layer entities and to multiple streams per each of the PAL and the upper layer entities. The frequency and time synchronization messages are delivered by MAC management action frames and can be aggregated in A-MPDU together with data, management and control MPDUs.
    Type: Application
    Filed: December 27, 2012
    Publication date: October 24, 2013
    Inventors: Solomon Trainin, Etan Shirron, Yaniv Frishman
  • Publication number: 20130179929
    Abstract: In a wireless video system, the clock rate for wirelessly transmitting the video data from the transmitting device should be identical to the clock rate for receiving the video data at the receiving device. But the two devices have separate clocks, whose frequencies may drift apart over time, leading the video buffer to be over run or under run. Clock synchronizing messages to prevent this may be sent at short intervals when clock synchronization is first being acquired, and at larger intervals after clock synchronization has already been achieved and is merely being maintained.
    Type: Application
    Filed: December 6, 2012
    Publication date: July 11, 2013
    Inventors: Guoqing C. Li, Etan Shirron, Yaniv Frishman, George R. Hayek