Patents by Inventor Yaniv Hadar

Yaniv Hadar has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220014400
    Abstract: Methods and apparatus to compensate for post-training insertion loss variation. Receiver Physical Layer (PHY) circuitry for each receive lane in a link comprising a chain of equalizer components including a Variable Gain Amplifier (VGA). In conjunction with initial link training, the VGA gain is set based on an initial temperature. During link training, one or more of the equalizer components are adjusted to obtain link convergence, followed by transitioning to a “link up” phase under which data transmission and reception begin. While operating in the link up phase, one or more of the equalizer components are adjusted in response to changes in interconnect insertion loss to maintain operation of the link within a link margin. The method may be implemented in various types of links including but not limited to Ethernet, PCIe, CXL, and UPI links.
    Type: Application
    Filed: September 24, 2021
    Publication date: January 13, 2022
    Inventors: Yaniv HADAR, Golan PERRY, Kevan A. LILLIE, Kenji HIRATA
  • Patent number: 10148469
    Abstract: An apparatus is provided which comprises: a data slicer to receive first data sampled by a data clock; an edge slicer to receive second data sampled by an edge clock; and a Least Mean Square (LMS) circuitry coupled to the data and edge slicers, wherein the LSM circuitry is to generate a code to adjust a phase of one of data clock and/or edge clock relative to one another.
    Type: Grant
    Filed: May 1, 2017
    Date of Patent: December 4, 2018
    Assignee: Intel Corporation
    Inventors: Mor M. Cohen, Yaniv Hadar, Ehud U. Shoor
  • Publication number: 20180316524
    Abstract: An apparatus is provided which comprises: a data slicer to receive first data sampled by a data clock; an edge slicer to receive second data sampled by an edge clock; and a Least Mean Square (LMS) circuitry coupled to the data and edge slicers, wherein the LSM circuitry is to generate a code to adjust a phase of one of data clock and/or edge clock relative to one another.
    Type: Application
    Filed: May 1, 2017
    Publication date: November 1, 2018
    Inventors: Mor M. COHEN, Yaniv HADAR, Ehud U. SHOOR
  • Patent number: 8130939
    Abstract: In one embodiment, the present invention includes an apparatus having an automatic gain control (AGC) stage to receive an input signal from a communication channel physical medium, a first local gain stage coupled to an output of the AGC stage, an equalizer coupled to an output of the first local gain stage, an echo canceller to receive local data to be transmitted along the communication channel physical medium, and a second local gain stage coupled to an output of the echo canceller. Other embodiments are described and claimed.
    Type: Grant
    Filed: March 30, 2007
    Date of Patent: March 6, 2012
    Assignee: Intel Corporation
    Inventors: Amir Mezer, Adee Ran, Ehud Shoor, Harry Birenboim, Yaniv Hadar, Assaf Benhamou
  • Patent number: 8000278
    Abstract: In one embodiment, a method is provided. In the method of this embodiment, in response, at least in part, to a determination that an idle condition exists, one or more packets may be transmitted to indicate, at least in part, that a transmitter is desired to refrain from transmitting, during one or more predetermined time intervals, to a receiver. Also in the method of this embodiment, also in response, at least in part, to the determination that the idle condition exists, the receiver may be de-activated, at least in part, during the one or more predetermined time intervals. Of course, many alternatives, variations, and modifications are possible without departing from this embodiment.
    Type: Grant
    Filed: May 12, 2003
    Date of Patent: August 16, 2011
    Assignee: Intel Corporation
    Inventors: Avi Costo, Mickey Gutman, Vicky Sigler, Yaniv Hadar
  • Patent number: 7747292
    Abstract: Techniques to perform adaptive interference cancellation are described. A first apparatus may include a timing recovery module to produce a timing recovery command signal, an interference canceller to receive an interference reference signal and produce an interference canceller signal, and an interpolator to couple to the timing recovery module and the interference canceller, the interpolator to receive the timing recovery command signal and the interference canceller signal and produce an interpolated interference canceller signal. A second apparatus may include a time-domain interference canceller to receive an interference reference signal and produce a time-domain interference canceller signal and a frequency-domain interference canceller to receive the interference reference signal and produce a frequency-domain interference canceller signal. Other embodiments are described and claimed.
    Type: Grant
    Filed: October 24, 2006
    Date of Patent: June 29, 2010
    Assignee: Intel Corporation
    Inventors: Amir Mezer, Yaniv Hadar, Ehud Shoor
  • Publication number: 20080240412
    Abstract: In one embodiment, the present invention includes an apparatus having an automatic gain control (AGC) stage to receive an input signal from a communication channel physical medium, a first local gain stage coupled to an output of the AGC stage, an equalizer coupled to an output of the first local gain stage, an echo canceler to receive local data to be transmitted along the communication channel physical medium, and a second local gain stage coupled to an output of the echo canceler. Other embodiments are described and claimed.
    Type: Application
    Filed: March 30, 2007
    Publication date: October 2, 2008
    Inventors: Amir Mezer, Adee Ran, Ehud Shoor, Harry Birenboim, Yaniv Hadar, Assaf Benhamou
  • Patent number: 7366930
    Abstract: According to some embodiments, an Ethernet link speed is determined based on a power-related configuration, and an Ethernet link is negotiated at the link speed. Embodiments may also include determination of whether a power-conserving protocol is enabled, and/or may be implemented by an Ethernet controller.
    Type: Grant
    Filed: December 17, 2002
    Date of Patent: April 29, 2008
    Assignee: Intel Corporation
    Inventors: Michael Gutman, Avi Costo, Yaniv Hadar
  • Publication number: 20080096512
    Abstract: Techniques to perform adaptive interference cancellation are described. A first apparatus may include a timing recovery module to produce a timing recovery command signal, an interference canceller to receive an interference reference signal and produce an interference canceller signal, and an interpolator to couple to the timing recovery module and the interference canceller, the interpolator to receive the timing recovery command signal and the interference canceller signal and produce an interpolated interference canceller signal. A second apparatus may include a time-domain interference canceller to receive an interference reference signal and produce a time-domain interference canceller signal and a frequency-domain interference canceller to receive the interference reference signal and produce a frequency-domain interference canceller signal. Other embodiments are described and claimed.
    Type: Application
    Filed: October 24, 2006
    Publication date: April 24, 2008
    Inventors: Amir Mezer, Yaniv Hadar, Ehud Shoor
  • Publication number: 20040228275
    Abstract: In one embodiment, a method is provided. In the method of this embodiment, in response, at least in part, to a determination that an idle condition exists, one or more packets may be transmitted to indicate, at least in part, that a transmitter is desired to refrain from transmitting, during one or more predetermined time intervals, to a receiver. Also in the method of this embodiment, also in response, at least in part, to the determination that the idle condition exists, the receiver may be de-activated, at least in part, during the one or more predetermined time intervals. Of course, many alternatives, variations, and modifications are possible without departing from this embodiment.
    Type: Application
    Filed: May 12, 2003
    Publication date: November 18, 2004
    Inventors: Avi Costo, Mickey Gutman, Vicky Sigler, Yaniv Hadar
  • Publication number: 20040117674
    Abstract: According to some embodiments, an Ethernet link speed is determined based on a power-related configuration, and an Ethernet link is negotiated at the link speed. Embodiments may also include determination of whether a power-conserving protocol is enabled, and/or may be implemented by an Ethernet controller.
    Type: Application
    Filed: December 17, 2002
    Publication date: June 17, 2004
    Inventors: Michael Gutman, Avi Costo, Yaniv Hadar