Abstract: The present disclosure relates to a fabricated concrete connection structure and a construction method, the structure including shear wall members. Tops of the shear wall members are fixedly connected to a plurality of connection female heads, and the plurality of connection female heads are arranged at equal intervals along length directions of the shear wall members. Reinforcing cage pre-formed holes penetrate through the tops and bottoms of the shear wall members. A plurality of connection male heads are arranged at equal intervals along the length directions of the shear wall members, and the plurality of connection male heads are in one-to-one correspondence with the plurality of connection female heads. One sides of the bottoms of the shear wall members are fixedly connected to folding plates. The present disclosure can achieve the purpose of connecting the shear wall members conveniently and quickly, improving the efficiency and quality of construction.

Abstract: The present disclosure relates to a fabricated concrete connection structure and a construction method, the structure including shear wall members. Tops of the shear wall members are fixedly connected to a plurality of connection female heads, and the plurality of connection female heads are arranged at equal intervals along length directions of the shear wall members. Reinforcing cage pre-formed holes penetrate through the tops and bottoms of the shear wall members. A plurality of connection male heads are arranged at equal intervals along the length directions of the shear wall members, and the plurality of connection male heads are in one-to-one correspondence with the plurality of connection female heads. One sides of the bottoms of the shear wall members are fixedly connected to folding plates. The present disclosure can achieve the purpose of connecting the shear wall members conveniently and quickly, improving the efficiency and quality of construction.

Abstract: A touch scanning method is used for a TPIC chip and includes: receiving a emission synchronization signal sent by a DDIC chip, the light emission synchronization signal being synchronized with an EM signal controlled by the DDIC chip; and by taking the emission synchronization signal as a synchronization reference, performing continuous touch scanning according to a touch scanning frequency, where a time point of the touch scanning is aligned with a time point at which the emission synchronization signal is received. The emission synchronization signal sent by the DDIC chip is synchronized with the EM signal, and the EM signal is stable, therefore upon the receipt of the emission synchronization signal, the TPIC chip can perform continuous touch scanning with the emission synchronization signal as the synchronization reference according to a stable touch scanning frequency, thereby facilitating the improvement of the identification rate and accuracy for a touch operation.

Abstract: Provided are an image display method, a display driver integrated circuit (DDIC) chip, an application processor (AP), a display screen module, and a terminal. The method is applied in the DDIC chip. The method includes: performing image scanning based on first image frame data issued by an AP, and performing frame compensation; stopping, in response to a compensation-stopping instruction issued by the AP, the frame compensation and waiting for the AP to issue image frame data, the compensation-stopping instruction being used to instruct the AP to prepare to issue new image frame data; and performing, in response to receiving second image frame data issued by the AP, image scanning based on the second image frame data and resuming the frame compensation.

Abstract: A display screen frequency conversion method, a DDIC chip, and a terminal are provided. The method includes: outputting a Tearing Effect (TE) signal to an Application Processor (AP) at a first base frame rate, and performing an image scanning and a frame compensating at the first base frame rate; receiving a frequency reducing instruction issued by the AP, wherein the frequency reducing instruction is configured to instruct to reduce a base frame rate of the display screen; and outputting the TE signal to the AP at a second base frame rate based on the frequency reducing instruction and continually performing the image scanning and the frame compensating at the first base frame rate, wherein the second base frame rate is less than the first base frame rate.

Abstract: A method of manufacturing a driving backplane for display includes: forming a first conductive pattern layer including first conductive lines on a base; and forming a second conductive pattern layer including electrode groups and second conductive lines on a side of the first conductive pattern layer away from the base. The first conductive lines and the second conductive lines cross and are insulated from each other; an electrode group includes a first electrode and a second electrode electrically connected to a corresponding second conductive line. Orthogonal projections, on the base, of the first electrode and a corresponding first conductive line have an overlapping region, and a portion of the first electrode, whose orthogonal projection on the base is located in the overlapping region, is in contact with a portion of the first conductive line, whose orthogonal projection on the base is located in the overlapping region.

Abstract: A feature recognition structure provided by the embodiments of the present disclosure comprises: a plurality of first electrodes and a plurality of second electrodes disposed on a base substrate, wherein orthogonal projections of the plurality of first electrodes and of the plurality of second electrodes on the base substrate intersect each other to form a plurality of overlap regions; and a plurality of functional patterns disposed between one or more of the plurality of first electrodes and corresponding one or more of the plurality of second electrodes, wherein an orthogonal projection of each of the plurality of functional patterns on the base substrate is located in a corresponding one of the plurality of overlap regions; the functional patterns comprise at least one piezoelectric material, and have at least two types of sub-patterns, and different types of the sub-patterns have substantially different piezoelectric coefficients.

Abstract: A level converter, a data processing method, and a display device are provided. The level converter is used for providing a direct current signal for image display and includes a storage circuit, a processing circuit, and a level conversion component. The level conversion component includes a plurality of level conversion circuits; the storage circuit is configured to store image data of an image to be displayed; the processing circuit is in signal connection with the storage circuit, and is configured to obtain control data corresponding to the image data of the image to be displayed according to the image data; and the level conversion component is in signal connection with the processing circuit, and is configured to control whether each of the plurality of level conversion circuits performs level conversion according to the control data, so as to generate the direct current signal.

Abstract: Disclosed includes an apparatus, a drive method, a display panel, and a display device. The apparatus may comprise a drive transistor, a light emitting device driven by the drive transistor and a comparator. The comparator may have a first input coupled to a pixel voltage, a second input coupled to a reference voltage, a first control terminal coupled to a first control voltage, a second control terminal coupled to a second control voltage, and an output coupled to a gate of the drive transistor. The comparator may be configured to output the first control voltage to the output during a first time period in which the pixel voltage is not smaller than the reference voltage and output the second control voltage to the output during a second time period in which the pixel voltage is smaller than the reference voltage.

Abstract: A pixel driving circuit for a light-emission-device-based display panel is provided, including a driving transistor coupled to a light-emission device per subpixel; a digital-driving circuit having a first input terminal configured to receive a pixel voltage signal corresponding to a grayscale level of a subpixel image to be displayed and a first output terminal coupled to a gate terminal of the driving transistor. The digital-driving circuit is configured to convert the pixel voltage signal to a digital signal and transform the digital signal to a pulse-width-modulation (PWM) signal outputted via the first output terminal to the gate terminal of the driving transistor. The PWM signal comprises a pulse width proportional to the grayscale level as a duty cycle in a period of driving the light-emitting device to display subpixel image.

Abstract: Disclosed includes an apparatus, a drive method, a display panel, and a display device. The apparatus may comprise a drive transistor, a light emitting device driven by the drive transistor and a comparator. The comparator may have a first input coupled to a pixel voltage, a second input coupled to a reference voltage, a first control terminal coupled to a first control voltage, a second control terminal coupled to a second control voltage, and an output coupled to a gate of the drive transistor. The comparator may be configured to output the first control voltage to the output during a first time period in which the pixel voltage is not smaller than the reference voltage and output the second control voltage to the output during a second time period in which the pixel voltage is smaller than the reference voltage.

Abstract: A pixel driving circuit for a light-emission-device-based display panel is provided, including a driving transistor coupled to a light-emission device per subpixel; a digital-driving circuit having a first input terminal configured to receive a pixel voltage signal corresponding to a grayscale level of a subpixel image to be displayed and a first output terminal coupled to a gate terminal of the driving transistor. The digital-driving circuit is configured to convert the pixel voltage signal to a digital signal and transform the digital signal to a pulse-width-modulation (PWM) signal outputted via the first output terminal to the gate terminal of the driving transistor. The PWM signal comprises a pulse width proportional to the grayscale level as a duty cycle m a period of driving the light-emitting device to display subpixel image.

Abstract: A level converter, a data processing method, and a display device are provided. The level converter is used for providing a direct current signal for image display and includes a storage circuit, a processing circuit, and a level conversion component. The level conversion component includes a plurality of level conversion circuits; the storage circuit is configured to store image data of an image to be displayed; the processing circuit is in signal connection with the storage circuit, and is configured to obtain control data corresponding to the image data of the image to be displayed according to the image data, and the level conversion component is in signal connection with the processing circuit, and is configured to control whether each of the plurality of level conversion circuits performs level conversion according to the control data, so as to generate the direct current signal.

Abstract: A method for filling holes in a naked-eye 3D multi-viewpoint image is provided, comprising: sequentially performing a step of mapping, determining and marking row by row, comprising mapping two first pixels adjacent to each other in a row direction among a plurality of first pixels in a reference camera image to two second pixels in a virtual camera image, determining whether there is a hole between the two second pixels, and if so, marking the hole; and sequentially performing a step of scanning, assessing and filling row by row, comprising scanning two second pixels adjacent to each other in a row direction, assessing whether there is a marked hole between the two adjacent second pixels, and filling the marked hole according to at least one non-zero second pixel which is adjacent to the marked hole.

Abstract: The present disclosure provides a display device and a driving method thereof, which relate to a field of display technology. According to the present disclosure, first image data and second image data are merged by using a graphics processor. The merged image data may be transmitted to a control chip through only one interface. Then the merged image may be split by the control chip to obtain first image data and third image data, which are respectively transmitted to a first driving chip and a second driving chip to drive a first display panel and a second display panel to display, wherein the third image data is at least partially the same as the second image data.

Abstract: The disclosure relates to a method and apparatus for converting a grayscale, and a display device, where color coordinates of respective pixel elements are determined according to grayscales corresponding to red sub-pixels, green sub-pixels, and blue sub-pixels in the respective pixel elements in image data of a frame to be displayed, and then the distances between the color coordinates of the respective pixel elements, and color coordinates of a preset white pixel on the panel, in a CIE chroma graph are determined; and the maximum grayscales of white sub-pixels in the respective pixel elements are further determined according to the respective determined distances and a preset segmentation function.

Abstract: Provided are a gate drive circuit and a driving method thereof, a display panel and a display device. The gate drive circuit includes a first sub-circuit group and a second sub-circuit group. The first sub-circuit group can drive the mth row to the first row of pixels of the N rows of pixels in the display panel row by row, and the second sub-circuit group can drive the (m+1)th row to the Nth row of pixels row by row. In addition, m is greater than 1 and less than N.

Abstract: Provided are a gate drive circuit and a driving method thereof, a display panel and a display device. The gate drive circuit includes a first sub-circuit group and a second sub-circuit group. The first sub-circuit group can drive the mth row to the first row of pixels of the N rows of pixels in the display panel row by row, and the second sub-circuit group can drive the (m+1)th row to the Nth row of pixels row by row. In addition, m is greater than 1 and less than N.

Abstract: A pixel circuit and a driving method, a display device. The pixel circuit includes: a main driving circuit, configured to, under control of a scanning signal line and a data signal line, output a main driving current signal to a fusing circuit; the fusing circuit configured to enable a light emitting circuit and the main driving circuit to be disconnected from each other; a fusing control circuit configured to, under control of a signal input terminal, enable the light emitting circuit and the main driving circuit to be disconnected from each other; a standby driving circuit configured to output a standby driving current signal to a switching circuit; the switching circuit configured to, under control of an input signal of a control line, connect the standby driving circuit to the light emitting circuit; and the light emitting circuit configured to emit light by using the standby driving current signal.

Abstract: A feature recognition structure provided by the embodiments of the present disclosure comprises: a plurality of first electrodes and a plurality of second electrodes disposed on a base substrate, wherein orthogonal projections of the plurality of first electrodes and of the plurality of second electrodes on the base substrate intersect each other to form a plurality of overlap regions; and a plurality of functional patterns disposed between one or more of the plurality of first electrodes and corresponding one or more of the plurality of second electrodes, wherein an orthogonal projection of each of the plurality of functional patterns on the base substrate is located in a corresponding one of the plurality of overlap regions; the functional patterns comprise at least one piezoelectric material, and have at least two types of sub-patterns, and different types of the sub-patterns have substantially different piezoelectric coefficients.