Patents by Inventor Yanli Zhao
Yanli Zhao has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20210149106Abstract: A backlight source, a liquid crystal module, and a display device are provided. The backlight source includes a back plate and a plurality of support structures. The back plate includes a side wall and a bottom plate, and the side wall and the bottom plate define a first groove. A plurality of the support structures are arranged along a circumferential direction of the side wall and spaced apart from each other. The support structure is detachably connected to the side wall, and extends toward a center of the accommodation groove to form a support plane.Type: ApplicationFiled: March 26, 2020Publication date: May 20, 2021Inventors: Xiaolong Liu, Zhihui Wang, Gang Chen, Changgong Zhu, Jianghong Wen, Keguo Liu, Xuefeng Wang, Yanli Zhao, Guang Wang, Yu Wang, Di Wang, He Sun
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Publication number: 20210124214Abstract: The present application provides a display panel and a display device. The display panel includes an array substrate and a color filter substrate arranged oppositely, and a light source on a side of the color filter substrate facing the array substrate. The color filter substrate includes a first region and a second region. An orthogonal projection of the array substrate on the color filter substrate is in the first region, and the light source is in the second region.Type: ApplicationFiled: September 4, 2020Publication date: April 29, 2021Inventors: Xiaolong LIU, Zhihui WANG, Changgong ZHU, Jianghong WEN, Keguo LIU, Xuefeng WANG, Yanli ZHAO, Guang WANG, Di WANG, Yu WANG
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Publication number: 20210063829Abstract: An array substrate, a manufacturing method thereof, and an electronic device are provided. The array substrate includes: a base substrate having a first side, a second side opposite to the first side and a via hole passing through a plate body of the base substrate; a switch element at the first side of the base substrate; and a pixel electrode which is at the second side of the base substrate and which is electrically connected with the switch element through the via hole.Type: ApplicationFiled: January 4, 2019Publication date: March 4, 2021Inventors: Xiaoji LI, Yanli ZHAO, Zhe LI, Peng LI, Haoxiang FAN
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Publication number: 20210000955Abstract: The present application provides an organosilica nanoparticle comprising: (a) a photosensitizer for photodynamic therapy covalently incorporated therein; and (b) optionally, at least one agent encapsulated therein, as well as a pharmaceutical composition comprising said organosilica nanoparticle. Also provided herein are said organosilica nanoparticle or pharmaceutical composition for use as a medicament or in the treatment of a disease, disorder, or condition. More specifically, provided is a method for treating a disease, disorder, or condition in a subject using said aid organosilica nanoparticle or pharmaceutical composition.Type: ApplicationFiled: December 5, 2018Publication date: January 7, 2021Inventors: Huijun Phoebe THAM, Keming XU, Wei Qi LIM, Hongzhong CHEN, Subramanian VENKATRAMAN, Chenjie XU, Yanli ZHAO
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Publication number: 20200302887Abstract: A display apparatus and a control method for controlling a display apparatus are provided. The display apparatus includes: a display panel including multiple rows of scan lines and multiple columns of data lines, the scan lines and the data lines defining multiple sub-pixel regions, a first view pixel and a second view pixel being provided in each sub-pixel region; and a view control device connected with display panel, the view control device configured to: identify the number of users on a user side of display panel; and control a driving voltage of the scan lines according to the number of the users, so that the display panel controls first view pixel and second view pixel according to driving voltage so as to display a first view mode or a second view mode. A visual angle in the first view mode is greater than a visual angle in the second view mode.Type: ApplicationFiled: August 9, 2019Publication date: September 24, 2020Inventors: Gang Chen, Zhihui Wang, He Sun, Xiuzhu Tang, Guang Wang, Yanli Zhao, Xiaolong Liu, Shuo Yang, Di Wang, Yu Wang
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Patent number: 10775653Abstract: The disclosure discloses an array substrate, a liquid crystal panel, and a process of fabricating the array substrate. The array substrate includes an orientation film, an upper electrode, a lower electrode, and an intermediate electrode located between the upper electrode and the lower electrode, wherein the intermediate electrode is configured to have drive voltage applied thereto when there is zero relative voltage between the upper electrode and the lower electrode, so that an electric field is generated between the intermediate electrode and the lower electrode, and a direction of the electric field is parallel to an orientation direction of the orientation film.Type: GrantFiled: June 8, 2018Date of Patent: September 15, 2020Assignees: BOE Technology Group Co., Ltd., Chongqing BOE Optoelectronics Technology Co., Ltd.Inventors: Yanli Zhao, Xiaoji Li, Zhi Zhang, He Sun, Xing Dong, Lijun Xiong, Tae Yup Min
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Patent number: 10553176Abstract: The disclosure discloses a display drive circuit, a display device, and a method for driving the same, where the display drive circuit includes a control circuit arranged between a power supply management circuit and a level conversion circuit, and the control circuit is configured to boost a standard gate turn-on voltage signal provided by the power supply management circuit, and to generate and then output a higher gate turn-on voltage signal to the level conversion circuit, upon determining that an ambient temperature is below a set temperature, and/or an output of a gate drive circuit of a display panel is abnormal, so that the level conversion circuit generates and then outputs a corresponding gate drive signal at higher voltage.Type: GrantFiled: June 12, 2018Date of Patent: February 4, 2020Assignees: BOE Technology Group Co., Ltd., Chongqing BOE Optoelectronics Technology Co., Ltd.Inventors: Lijun Xiong, Zhi Zhang, Heecheol Kim, Xiuzhu Tang, Shuai Chen, Jingpeng Zhao, Xing Dong, Xiaolong Liu, Gang Chen, Yanli Zhao
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Patent number: 10475896Abstract: A silicon carbide MOSFET device is disclosed. The silicon carbide MOSFET device includes a gate oxide layer which is constituted by a first gate oxide layer and a second gate oxide layer. A thickness of the second gate oxide layer is larger than a thickness of the first gate oxide layer. Through dividing the gate oxide layer into two parts with different thicknesses, i.e., enabling the gate oxide layer to have a staircase shape, an electric field strength of the gate oxide layer can be effectively reduced, while a threshold voltage and a gate control property of the device are not affected. An on-resistance of the device can be reduced through increasing a width of a JFET region. A method for manufacturing the silicon carbide MOSFET device is further disclosed.Type: GrantFiled: May 26, 2016Date of Patent: November 12, 2019Assignee: ZHUZHOU CRRC TIMES ELECTRIC CO., LTD.Inventors: Yunbin Gao, Chengzhan Li, Guoyou Liu, Yudong Wu, Jingjing Shi, Yanli Zhao
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Publication number: 20190258123Abstract: The present disclosure provides a display panel. The display panel of the present disclosure includes: a first substrate and a second substrate disposed opposite to each other, and a liquid crystal layer disposed between the first substrate and the second substrate; wherein the first substrate is divided into a plurality of pixel regions, and the pixel regions include a central region and a peripheral region, a first electrode and a second electrode are sequentially disposed on a surface of the first substrate facing the liquid crystal layer in a direction from the first substrate to the liquid crystal layer; the first electrode and the second electrode are configured to form an electric field under a voltage to drive liquid crystal molecules in the liquid crystal layer to deflect; and an edge electrode disposed on the second substrate, wherein the orthographic projection of the edge electrode on the first substrate at least partially overlaps the peripheral region.Type: ApplicationFiled: August 22, 2018Publication date: August 22, 2019Inventors: Yanli Zhao, Xiaoji Li, Changgong Zhu, Jianghong Wen, Xiaolong Liu, Wenhao You, Xiuzhu Tang
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Publication number: 20190235325Abstract: A display panel and a manufacturing method thereof, and a display device are provided. The display panel includes a first substrate and a second substrate disposed opposite to each other, and a liquid crystal layer therebetween; and at least one pixel electrode and at least one common electrode disposed on at least one of the first substrate and the second substrate; wherein at least one orthographic projection of the at least one pixel electrode on a first base substrate of the first substrate and at least one orthographic projection of the at least one common electrode on the first base substrate are alternately arranged along a first direction in which the first base substrate extends; and a ratio of a height of the at least one pixel electrode to a thickness of the liquid crystal layer is in a range of 20%-50.Type: ApplicationFiled: September 14, 2018Publication date: August 1, 2019Inventors: Xiaoji LI, Yanli ZHAO, Zhe LI, Haoxiang FAN, Peng LI, Lan XIN, Peng QIN
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Publication number: 20190057668Abstract: The disclosure discloses a display drive circuit, a display device, and a method for driving the same, where the display drive circuit includes a control circuit arranged between a power supply management circuit and a level conversion circuit, and the control circuit is configured to boost a standard gate turn-on voltage signal provided by the power supply management circuit, and to generate and then output a higher gate turn-on voltage signal to the level conversion circuit, upon determining that an ambient temperature is below a set temperature, and/or an output of a gate drive circuit of a display panel is abnormal, so that the level conversion circuit generates and then outputs a corresponding gate drive signal at higher voltage.Type: ApplicationFiled: June 12, 2018Publication date: February 21, 2019Inventors: Lijun XIONG, Zhi ZHANG, Heecheol KIM, Xiuzhu TANG, Shuai CHEN, Jingpeng ZHAO, Xing DONG, Xiaolong LIU, Gang CHEN, Yanli ZHAO
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Publication number: 20190056610Abstract: The disclosure discloses an array substrate, a liquid crystal panel, and a process of fabricating the array substrate. The array substrate includes an orientation film, an upper electrode, a lower electrode, and an intermediate electrode located between the upper electrode and the lower electrode, wherein the intermediate electrode is configured to have drive voltage applied thereto when there is zero relative voltage between the upper electrode and the lower electrode, so that an electric field is generated between the intermediate electrode and the lower electrode, and a direction of the electric field is parallel to an orientation direction of the orientation film.Type: ApplicationFiled: June 8, 2018Publication date: February 21, 2019Inventors: Yanli ZHAO, Xiaoji LI, Zhi ZHANG, He SUN, Xing DONG, Lijun XIONG, Tae Yup MIN
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Publication number: 20190041703Abstract: The present disclosure relates to a display device, a liquid crystal display panel and a driving method for a liquid crystal display panel. The liquid crystal display panel includes: an array substrate including a plurality of sub-pixels having active display areas, each of the sub-pixels including a plurality of first electrodes, and a first slit being disposed between adjacent first electrodes; an opposite substrate facing the array substrate, wherein a first surface of the opposite substrate facing the array substrate includes at least a target area facing an edge area of the active display area; and a control electrode disposed in the target area and opposite to the first electrode, for generating an electric field in a target direction with the first electrode, so as to control liquid crystals between an edge area of the array substrate and the target area of the opposite substrate to be deflected.Type: ApplicationFiled: March 26, 2018Publication date: February 7, 2019Inventors: Yanli ZHAO, Xiaoji LI, Keguo LIU, Xiuzhu TANG, Xiaolong LIU, He SUN
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Publication number: 20190034162Abstract: A virtual reality device and an input control method for a virtual reality device are disclosed. The virtual reality device comprises: a microprocessor, a display screen, a microphone and a memory that are connected with the microprocessor. The microprocessor identifies semantics of voice information collected by the microphone and converts them to text information; and detects whether a cursor is on the display screen, and if yes, inputs the text information to a position of the cursor on the display screen, and if no, compares the text information to keywords in the memory, and when an operation command is detected and is for executing a visual interface operation, executes the corresponding visual interface operation; and when an operation command is detected and is for opening an application or a file, detects whether the application or file name exists in remaining text information, and if yes, opens a corresponding application or file.Type: ApplicationFiled: December 31, 2016Publication date: January 31, 2019Inventor: Yanli ZHAO
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Publication number: 20190027568Abstract: A silicon carbide MOSFET device is disclosed. The silicon carbide MOSFET device includes a gate oxide layer which is constituted by a first gate oxide layer and a second gate oxide layer. A thickness of the second gate oxide layer is larger than a thickness of the first gate oxide layer. Through dividing the gate oxide layer into two parts with different thicknesses, i.e., enabling the gate oxide layer to have a staircase shape, an electric field strength of the gate oxide layer can be effectively reduced, while a threshold voltage and a gate control property of the device are not affected. An on-resistance of the device can be reduced through increasing a width of a JFET region. A method for manufacturing the silicon carbide MOSFET device is further disclosed.Type: ApplicationFiled: May 26, 2016Publication date: January 24, 2019Inventors: Yunbin GAO, Chengzhan LI, Guoyou LIU, Yudong WU, Jingjing SHI, Yanli ZHAO
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Publication number: 20190006490Abstract: A thin film transistor, a method for fabricating the same, a display device, and an exposure device are disclosed. The method comprises: patterning a source and drain layer by using a single slit mask and an exposure machine, to form a source, a drain, and an active region of the thin film transistor; wherein a pattern resolution of the single slit mask is not larger than a resolution of the exposure machine to form a groove shaped exposure pattern, wherein the groove shaped exposure pattern corresponds to the active region.Type: ApplicationFiled: April 13, 2018Publication date: January 3, 2019Inventors: Zhuo XU, Ming DENG, Zhihui WANG, Xiuzhu TANG, Shuai CHEN, Zhenguo TIAN, Keguo LIU, Yanli ZHAO
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Patent number: 10168572Abstract: The present disclosure provides a display device and a backlight source. The display device includes a liquid crystal panel and a backlight source. The liquid crystal panel includes a color filter substrate, an array substrate arranged opposite to the color filter substrate, and a blue phase liquid crystal layer arranged between the color filter substrate and the array substrate. A first driving electrode is arranged at a side of the color filter substrate facing the array substrate, and a second driving electrode is arranged at a side of the array substrate facing the color filter substrate. The backlight source includes: a light guide plate; and a composite layer arranged at a light-exiting surface of the light guide plate and including a plurality of dielectric layers whose refractive indices decrease gradually in a direction away from the light-exiting surface of the light guide plate.Type: GrantFiled: April 3, 2018Date of Patent: January 1, 2019Assignees: BOE TECHNOLOGY GROUP CO., LTD., CHONGQING BOE OPTOELECTRONICS TECHNOLOGY CO., LTD.Inventors: Yanli Zhao, Xiaoji Li, Xiuzhu Tang, Keguo Liu, Changgong Zhu, Jianghong Wen, Shuangyu Li
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Patent number: 9705023Abstract: An avalanche photodiode includes a GeOI substrate; an I—Ge absorption layer configured to absorb an optical signal and generate a photo-generated carrier; a first p-type SiGe layer, a second p-type SiGe layer, a first SiGe layer, and a second SiGe layer, where a Si content in any one of the SiGe layers is less than or equal to 20%; a first SiO2 oxidation layer and a second SiO2 oxidation layer; a first taper type silicon Si waveguide layer and a second taper type silicon Si waveguide layer; a heavily-doped n-type silicon Si multiplication layer; and anode electrodes and a cathode electrode.Type: GrantFiled: August 11, 2016Date of Patent: July 11, 2017Assignee: Huawei Technologies Co., Ltd.Inventors: Changliang Yu, Zhenxing Liao, Yanli Zhao
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Patent number: 9530505Abstract: An EEPROM memory cell gate control signal generating circuit, which includes a high-voltage row decoding circuit and a plurality of word selection circuits; the output of the high-voltage row decoding circuit is divided into two routes, which output a first total wordline voltage used for providing the erasing positive voltage and a second total wordline voltage used for providing the erasing negative voltage, respectively; besides, the two-route voltages are inputted into the individual word selection circuits respectively, which avoids the influence of the erasing positive voltage on the grid oxide layer of an NMOS transistor and the influence of the erasing negative voltage on a PMOS transistor, and can save the MOS transistor used for isolating the grid oxide layer.Type: GrantFiled: December 21, 2015Date of Patent: December 27, 2016Assignee: Shanghai Huahong Grace Semiconductor Manufacturing CorporationInventors: Guoyou Feng, Yanli Zhao
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Publication number: 20160365148Abstract: An EEPROM memory cell gate control signal generating circuit, which includes a high-voltage row decoding circuit and a plurality of word selection circuits; the output of the high-voltage row decoding circuit is divided into two routes, which output a first total wordline voltage used for providing the erasing positive voltage and a second total wordline voltage used for providing the erasing negative voltage, respectively; besides, the two-route voltages are inputted into the individual word selection circuits respectively, which avoids the influence of the erasing positive voltage on the grid oxide layer of an NMOS transistor and the influence of the erasing negative voltage on a PMOS transistor, and can save the MOS transistor used for isolating the grid oxide layer.Type: ApplicationFiled: December 21, 2015Publication date: December 15, 2016Applicant: SHANGHAI HUAHONG GRACE SEMICONDUCTOR MANUFACTURING CORPORATIONInventors: Guoyou Feng, Yanli Zhao