Patents by Inventor Yann BEILLIARD

Yann BEILLIARD has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Method of assembly by direct bonding between two elements, each element comprising portions of metal and dielectric materials
    Patent number: 11305372
    Abstract: Method of assembly of a first element (I) and a second element (II) each having an assembly surface, at least one of the assembly surfaces comprising recessed metal portions (6, 106) surrounded by dielectric materials (4, 104) comprising: A) a step to bring the two assembly surfaces into contact without application of pressure such that direct bonding is obtained between the assembly surfaces, said first and second assemblies (I, II) forming a stack with a given thickness (e), B) a heat treatment step of said stack during which the back faces (10, 110) of the first (I) and the second (II) elements are held in position so that they are held at a fixed distance (E) between the given stack thickness+/?2 nm.
    Type: Grant
    Filed: October 2, 2014
    Date of Patent: April 19, 2022
    Assignee: COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES
    Inventors: Lea Di Cioccio, Yann Beilliard
  • Device comprising a three-dimensional integrated structure with simplified thermal dissipation, and corresponding fabrication method
    Patent number: 9449896
    Abstract: A device includes a support, a three-dimensional integrated structure above the support, and a lateral encapsulation region arranged around the structure. The lateral encapsulation region includes first channels configured to make it possible to circulate a cooling fluid.
    Type: Grant
    Filed: January 6, 2015
    Date of Patent: September 20, 2016
    Assignees: STMICROELECTRONICS SA, STMICROELECTRONICS (CROLLES 2) SAS
    Inventors: Sandrine Lhostis, Olga Kokshagina, Yann Beilliard, Vincent Fiori
  • Process for producing at least one through-silicon via with improved heat dissipation, and corresponding three-dimensional integrated structure
    Patent number: 9165861
    Abstract: A method for producing at least one through-silicon via inside a substrate may include forming a cavity in the substrate from a first side of the substrate until an electrically conductive portion is emerged onto. The method may also include forming an electrically conductive layer at a bottom and on walls of the cavity, and at least partly on a first side outside the cavity. The process may further include at least partially filling the cavity with at least one phase-change material. Another aspect is directed to a three-dimensional integrated structure.
    Type: Grant
    Filed: May 27, 2014
    Date of Patent: October 20, 2015
    Assignees: STMICROELECTRONICS SA, STMICROELECTRONICS (CROLLES 2) SAS
    Inventors: Pierre Bar, Simon Gousseau, Yann Beilliard
  • DEVICE COMPRISING A THREE-DIMENSIONAL INTEGRATED STRUCTURE WITH SIMPLIFIED THERMAL DISSIPATION, AND CORRESPONDING FABRICATION METHOD
    Publication number: 20150200151
    Abstract: A device includes a support, a three-dimensional integrated structure above the support, and a lateral encapsulation region arranged around the structure. The lateral encapsulation region includes first channels configured to make it possible to circulate a cooling fluid.
    Type: Application
    Filed: January 6, 2015
    Publication date: July 16, 2015
    Inventors: Sandrine LHOSTIS, Olga Kokshagina, Yann Beilliard, Vincent Fiori
  • PROCESS FOR DIRECT BONDING OF TWO ELEMENTS COMPRISING METALLIC PORTIONS AND DIELECTRIC MATERIALS
    Publication number: 20150097022
    Abstract: Method of assembly of a first element (I) and a second element (II) each having an assembly surface, at least one of the assembly surfaces comprising recessed metal portions (6, 106) surrounded by dielectric materials (4, 104) comprising: A) a step to bring the two assembly surfaces into contact without application of pressure such that direct bonding is obtained between the assembly surfaces, said first and second assemblies (I, II) forming a stack with a given thickness (e), B) a heat treatment step of said stack during which the back faces (10, 110) of the first (I) and the second (II) elements are held in position so that they are held at a fixed distance (E) between the given stack thickness+/?2 nm.
    Type: Application
    Filed: October 2, 2014
    Publication date: April 9, 2015
    Applicant: COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENE ALT
    Inventors: Lea DI CIOCCIO, Yann BEILLIARD
  • PROCESS FOR PRODUCING AT LEAST ONE THROUGH-SILICON VIA WITH IMPROVED HEAT DISSIPATION, AND CORRESPONDING THREE-DIMENSIONAL INTEGRATED STRUCTURE
    Publication number: 20140361440
    Abstract: A method for producing at least one through-silicon via inside a substrate may include forming a cavity in the substrate from a first side of the substrate until an electrically conductive portion is emerged onto. The method may also include forming an electrically conductive layer at a bottom and on walls of the cavity, and at least partly on a first side outside the cavity. The process may further include at least partially filling the cavity with at least one phase-change material. Another aspect is directed to a three-dimensional integrated structure.
    Type: Application
    Filed: May 27, 2014
    Publication date: December 11, 2014
    Applicants: STMicroelectronics SA, STMicroelectronics (Crolles 2) SAS
    Inventors: PIERRE BAR, Simon GOUSSEAU, Yann BEILLIARD