Patents by Inventor Yannick BAINES
Yannick BAINES has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240385294Abstract: Optical detection devices wherein a bias voltage of a photoelectric conversion element is accurately adjustable regardless of a quantity of incident light are disclosed. In one example, an optical detection device includes a first pixel that has a photoelectric conversion element for generating a carrier by photoelectric conversion, a second pixel that has a carrier generation unit for generating a carrier by a cause other than photoelectric conversion, and a control circuit that controls a bias voltage applied to each of the photoelectric conversion element and the carrier generation unit, according to the carrier generated by the second pixel. The photoelectric conversion element includes a first photoelectric conversion region and a first pinning film disposed at a position in contact with the first photoelectric conversion region. The carrier generation unit includes a second photoelectric conversion region, and includes a second pinning film that is partially removed.Type: ApplicationFiled: September 29, 2022Publication date: November 21, 2024Inventors: Yasunori Tsukuda, Shohei Shimada, Yannick Baines, Takeshi Matsunuma
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Patent number: 12040390Abstract: An electronic component includes a substrate; a stack of two layers of different semiconductor materials, designed to form a layer of electron gas at the interface thereof or close to same; and a buried barrier forming a separation between the substrate and said stack. The buried barrier includes a first layer of a ternary alloy of semiconductor material of the III-N type, having an increasing concentration of one of the chemical species of the ternary alloy of the first layer the closer it is to the substrate; and a second layer of a ternary alloy of semiconductor material of the III-N type, formed beneath the first layer and having a decreasing concentration of one of the chemical species of the ternary alloy of the first layer the closer it is to the substrate.Type: GrantFiled: November 26, 2018Date of Patent: July 16, 2024Assignee: COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVESInventors: Yannick Baines, Pascal Scheiblin
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Patent number: 11189716Abstract: A normally-off heterojunction field-effect transistor is provided, including a superposition of a first layer, of III-N type, and of a second layer, of III-N type, so as to form a two-dimensional electron gas; a stack of an n-doped third layer making electrical contact with the second layer, and of a p-doped fourth layer placed in contact with and on the third layer, a first conductive electrode and a second conductive electrode making electrical contact with the two-dimensional electron gas; a dielectric layer disposed against a lateral face of the fourth layer; and a control electrode separated from the lateral face of the fourth layer by the dielectric layer.Type: GrantFiled: July 2, 2019Date of Patent: November 30, 2021Assignee: Commissariat A L'Energie Atomique et aux Energies AlternativesInventors: Yannick Baines, Julien Buckley, Rene Escoffier
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Publication number: 20210126118Abstract: An electronic component includes a substrate; a stack of two layers of different semiconductor materials, designed to form a layer of electron gas at the interface thereof or close to same; and a buried barrier forming a separation between the substrate and said stack. The buried barrier includes a first layer of a ternary alloy of semiconductor material of the III-N type, having an increasing concentration of one of the chemical species of the ternary alloy of the first layer the closer it is to the substrate; and a second layer of a ternary alloy of semiconductor material of the III-N type, formed beneath the first layer and having a decreasing concentration of one of the chemical species of the ternary alloy of the first layer the closer it is to the substrate.Type: ApplicationFiled: November 26, 2018Publication date: April 29, 2021Applicant: COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVESInventors: Yannick BAINES, Pascal SCHEIBLIN
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Publication number: 20200013887Abstract: A normally-off heterojunction field-effect transistor is provided, including a superposition of a first layer, of III-N type, and of a second layer, of III-N type, so as to form a two-dimensional electron gas; a stack of an n-doped third layer making electrical contact with the second layer, and of a p-doped fourth layer placed in contact with and on the third layer, a first conductive electrode and a second conductive electrode making electrical contact with the two-dimensional electron gas; a dielectric layer disposed against a lateral face of the fourth layer; and a control electrode separated from the lateral face of the fourth layer by the dielectric layer.Type: ApplicationFiled: July 2, 2019Publication date: January 9, 2020Applicant: Commissariat A L'Energie Atomique et aux Energies AlternativesInventors: Yannick BAINES, Julien BUCKLEY, Rene ESCOFFIER
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Patent number: 10283499Abstract: A heterojunction diode is provided, including first and second semiconductor layers made of III-N material, the layers being superposed to form a two-dimensional electron gas; an anode and a cathode that are selectively electrically connected to each other by the electron gas; a third semiconductor layer positioned under the gas; a p-doped first semiconductor element contacting the anode the third layer, and forming a separation between the anode and the third layer; and an n-doped second semiconductor element contacting the cathode and the third layer, and forming a separation between the cathode and the third layer, the third layer and the first and second elements forming a p-i-n diode.Type: GrantFiled: November 17, 2016Date of Patent: May 7, 2019Assignee: COMMISSARIAT À L'ÉNERGIE ATOMIQUE ET AUX ÉNERGIES ALTERNATIVESInventors: Yannick Baines, Julien Buckley
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Patent number: 10211305Abstract: The invention relates to a normally-off high-electron-mobility field-effect transistor having a superposition of a first layer of semiconductor material and a second layer of semiconductor material so as form an electron gas layer at the interface between the first and second layers. A trench separates the superposition into first and second domains. An insulating element is positioned in the trench in order to electrically insulate the first and second domains. A p-doped semiconductor element is in contact with the first or the second layer of semiconductor material of the first and second domains, and extends continuously between the first and second domains. A gate insulator is positioned on the semiconductor element and a gate electrode is positioned on the gate insulator.Type: GrantFiled: April 28, 2017Date of Patent: February 19, 2019Assignee: Commissariat A L'Energie Atomique et aux Energies AlternativesInventors: Yannick Baines, Julien Buckley
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Publication number: 20180374848Abstract: A heterojunction diode is provided, including first and second semiconductor layers made of III-N material, the layers being superposed to form a two-dimensional electron gas; an anode and a cathode that are selectively electrically connected to each other by the electron gas; a third semiconductor layer positioned under the gas; a p-doped first semiconductor element contacting the anode the third layer, and forming a separation between the anode and the third layer; and an n-doped second semiconductor element contacting the cathode and the third layer, and forming a separation between the cathode and the third layer, the third layer and the first and second elements forming a p-i-n diode.Type: ApplicationFiled: November 17, 2016Publication date: December 27, 2018Applicant: COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVESInventors: Yannick BAINES, Julien BUCKLEY
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Publication number: 20170330944Abstract: The invention relates to a normally-off high-electron-mobility field-effect transistor (1), comprising: a superposition of a first layer of semiconductor material (15) and a second layer of semiconductor material (16) so as form an electron gas layer (17) at the interface between these first and second layers; a trench (5) separating the superposition into first and second domains (51, 52); an insulating element (34) positioned in said trench in order to electrically insulate said first and second domains; a p-doped semiconductor element (33) in contact with the first or the second layer of semiconductor material (16) of the first and second domains (51, 52), and extending continuously between the first and second domains; a gate insulator (32) positioned on the semiconductor element (33); a gate electrode (31) positioned on the gate insulator (32).Type: ApplicationFiled: April 28, 2017Publication date: November 16, 2017Applicant: Commissariat à l'énergie atomique et aux énergies alternativesInventors: Yannick BAINES, Julien Buckley