Patents by Inventor Yannick Daurelle

Yannick Daurelle has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Bridging local semiconductor interconnects
    Patent number: 10032794
    Abstract: A semiconductor device includes a plurality of gates formed upon a semiconductor substrate that includes a plurality of outer active areas (e.g. CMOS/PMOS areas, source/drain regions, etc.) and one or more inner active areas. An isolator is formed upon one or more inner gates associated with the one or more inner active areas. A contact bar electrically connects the outer active areas and/or outer gates and is formed upon the isolator. The isolator electrically insulates the contact bar from the one or more inner active areas and/or the one or more inner gates.
    Type: Grant
    Filed: October 27, 2017
    Date of Patent: July 24, 2018
    Assignees: International Business Machines Corporation, STMicroelectronics, Inc.
    Inventors: Wai-Kin Li, Chieh-Yu Lin, Yannick Daurelle
  • BRIDGING LOCAL SEMICONDUCTOR INTERCONNECTS
    Publication number: 20180047755
    Abstract: A semiconductor device includes a plurality of gates formed upon a semiconductor substrate that includes a plurality of outer active areas (e.g. CMOS/PMOS areas, source/drain regions, etc.) and one or more inner active areas. An isolator is formed upon one or more inner gates associated with the one or more inner active areas. A contact bar electrically connects the outer active areas and/or outer gates and is formed upon the isolator. The isolator electrically insulates the contact bar from the one or more inner active areas and/or the one or more inner gates.
    Type: Application
    Filed: October 27, 2017
    Publication date: February 15, 2018
    Inventors: Wai-Kin Li, Chieh-Yu Lin, Yannick Daurelle
  • Bridging local semiconductor interconnects
    Patent number: 9859303
    Abstract: A semiconductor device includes a plurality of gates formed upon a semiconductor substrate that includes a plurality of outer active areas (e.g. CMOS/PMOS areas, source/drain regions, etc.) and one or more inner active areas. An isolator is formed upon one or more inner gates associated with the one or more inner active areas. A contact bar electrically connects the outer active areas and/or outer gates and is formed upon the isolator. The isolator electrically insulates the contact bar from the one or more inner active areas and/or the one or more inner gates.
    Type: Grant
    Filed: September 23, 2016
    Date of Patent: January 2, 2018
    Assignees: International Business Machines Corporation, STMicroelectronics, Inc.
    Inventors: Wai-Kin Li, Chieh-Yu Lin, Yannick Daurelle
  • BRIDGING LOCAL SEMICONDUCTOR INTERCONNECTS
    Publication number: 20170012061
    Abstract: A semiconductor device includes a plurality of gates formed upon a semiconductor substrate that includes a plurality of outer active areas (e.g. CMOS/PMOS areas, source/drain regions, etc.) and one or more inner active areas. An isolator is formed upon one or more inner gates associated with the one or more inner active areas. A contact bar electrically connects the outer active areas and/or outer gates and is formed upon the isolator. The isolator electrically insulates the contact bar from the one or more inner active areas and/or the one or more inner gates.
    Type: Application
    Filed: September 23, 2016
    Publication date: January 12, 2017
    Inventors: Wai-Kin Li, Chieh-Yu Lin, Yannick Daurelle
  • Bridging local semiconductor interconnects
    Patent number: 9515148
    Abstract: A semiconductor device includes a plurality of gates formed upon a semiconductor substrate that includes a plurality of outer active areas (e.g. CMOS/PMOS areas, source/drain regions, etc.) and one or more inner active areas. An isolator is formed upon one or more inner gates associated with the one or more inner active areas. A contact bar electrically connects the outer active areas and/or outer gates and is formed upon the isolator. The isolator electrically insulates the contact bar from the one or more inner active areas and/or the one or more inner gates.
    Type: Grant
    Filed: November 11, 2013
    Date of Patent: December 6, 2016
    Assignees: International Business Machines Corporation, STMicroelectronics, Inc.
    Inventors: Wai-Kin Li, Chieh-Yu Lin, Yannick Daurelle
  • BRIDGING LOCAL SEMICONDUCTOR INTERCONNECTS
    Publication number: 20150129961
    Abstract: A semiconductor device includes a plurality of gates formed upon a semiconductor substrate that includes a plurality of outer active areas (e.g. CMOS/PMOS areas, source/drain regions, etc.) and one or more inner active areas. An isolator is formed upon one or more inner gates associated with the one or more inner active areas. A contact bar electrically connects the outer active areas and/or outer gates and is formed upon the isolator. The isolator electrically insulates the contact bar from the one or more inner active areas and/or the one or more inner gates.
    Type: Application
    Filed: November 11, 2013
    Publication date: May 14, 2015
    Applicants: STMicroelectronics, INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Wai-Kin Li, Chieh-Yu Lin, Yannick Daurelle