Abstract: In accordance with an embodiment, a pixel includes at least two switches, each switch having a control terminal and first and second current carrying terminals. The control terminals of the first and second switches are commonly connected together. In accordance with another embodiment, a method for transferring charge from a first switch to a capacitance includes applying voltage to the commonly connected control terminals of the first and second switches.

Abstract: In accordance with an embodiment, a passive integrator includes a charge storage element coupled between first and second transistors, wherein the first transistor has a current carrying electrode coupled for receiving a signal and a current carrying electrode coupled to the charge storage element. The second transistor has a current carrying electrode coupled to the charge storage element and a second current carrying electrode coupled to another charge storage element.

Abstract: In accordance with an embodiment, a gating device is connected to a pixel core. The gating device may include a control structure and one or more terminals, wherein the one or more terminals are commonly connected to each other and connected to the pixel core. Alternatively, the terminals may be connected to corresponding photodiodes.

Abstract: In accordance with an embodiment, a gain enhancement circuit includes an amplifier having an input terminal, a transistor coupled to the input terminal and a capacitance dynamically coupled to another input terminal of the amplifier by a switch, wherein the capacitance is a parasitic element of the transistor.

Abstract: In accordance with an embodiment, a gating device is connected to a pixel core. The gating device may include a control structure and one or more terminals, wherein the one or more terminals are commonly connected to each other and connected to the pixel core. Alternatively, the terminals may be connected to corresponding photodiodes.

Abstract: In accordance with an embodiment, a passive integrator includes a charge storage element coupled between first and second transistors, wherein the first transistor has a current carrying electrode coupled for receiving a signal and a current carrying electrode coupled to the charge storage element. The second transistor has a current carrying electrode coupled to the charge storage element and a second current carrying electrode coupled to another charge storage element.

Abstract: An active pixel including a precharge circuit for a sample and hold (S/H) stage and methods of operating the same are provided. In addition to the precharge circuit and S/H stage, the pixel may include a sensor circuit to generate a signal in response to electromagnetic radiation received on a photodetector included therein, and a multiplexer circuit. The S/H stage may include a switching-element to couple the signal from the sensor circuit to a capacitor element in the S/H stage to read-out and store the signal. The multiplexer circuit may include a switching-element coupled to an output node of the capacitor element to couple the signal to a column. The precharge circuit may include a switching-element coupled between the output node of the capacitor element and the column to precharge the capacitor element to a fixed voltage applied to the column when the S/H stage is not reading-out the signal.

Abstract: In accordance with an embodiment, a pixel includes at least two switches, each switch having a control terminal and first and second current carrying terminals. The control terminals of the first and second switches are commonly connected together. In accordance with another embodiment, a method for transferring charge from a first switch to a capacitance includes applying voltage to the commonly connected control terminals of the first and second switches.

Abstract: In accordance with an embodiment, a pixel includes a first stage coupled to a second stage. The second stage includes a sampling capacitor and a subtraction capacitor.

Abstract: In accordance with an embodiment, a gain enhancement circuit includes an amplifier having an input terminal, a transistor coupled to the input terminal and a capacitance dynamically coupled to another input terminal of the amplifier by a switch, wherein the capacitance is a parasitic element of the transistor.

Abstract: A bus driver having one or more feedback paths between a column amplifier and a pixel bus in an image sensor is described.

Abstract: A correlated double sampling (CDS) pixel and methods of operating the same are provided. The CDS pixel includes a sensor circuit to generate a voltage value corresponding to electromagnetic radiation received on a photodetector included therein, and a sample and hold (S/H) stage including a sample switching-element and first and second capacitor-elements. The first capacitor-element is coupled between an output of the sensor circuit through the sample switching-element and a predetermined reference potential. The second capacitor-element has a first node coupled to the output of the sensor circuit through the sample switching-element and a second node coupled in series with an output of the S/H stage, the second node of the second capacitor-element further coupled through a calibration switching-element to a calibration voltage to sample a reset voltage value on the photodetector at a first time at a beginning of an integration period following reset of the sensor circuit.

Abstract: A pixel having a high voltage DC supply being replaced by a pulsed signal high voltage supply that is coupled to one of the plates of a memory capacitor in the pixel.

Abstract: An in-pixel correlated double sampling (CDS) pixel and methods of operating the same are provided. The CDS pixel includes a photodetector to accumulate radiation induced charges, a floating diffusion element electrically coupled to an output of the photodetector through a transfer switch, and. a capacitor-element having an input node electrically coupled to an amplifier and through the amplifier to the floating diffusion element and an output node electrically coupled to an output of the pixel. The capacitor-element is configured to sample a reset value of the floating diffusion element during a reset sampling and to sample a signal value of the floating diffusion element during a signal sampling.

Abstract: A correlated double sampling (CDS) pixel and methods of operating the same are provided. The CDS pixel includes a sensor circuit to generate a voltage value corresponding to electromagnetic radiation received on a photodetector included therein, and a sample and hold (S/H) stage including a sample switching-element and first and second capacitor-elements. The first capacitor-element is coupled between an output of the sensor circuit through the sample switching-element and a predetermined reference potential. The second capacitor-element has a first node coupled to the output of the sensor circuit through the sample switching-element and a second node coupled in series with an output of the S/H stage, the second node of the second capacitor-element further coupled through a calibration switching-element to a calibration voltage to sample a reset voltage value on the photodetector at a first time at a beginning of an integration period following reset of the sensor circuit.

Abstract: An active pixel including a precharge circuit for a sample and hold (S/H) stage and methods of operating the same are provided. In addition to the precharge circuit and S/H stage, the pixel may include a sensor circuit to generate a signal in response to electromagnetic radiation received on a photodetector included therein, and a multiplexer circuit. The S/H stage may include a switching-element to couple the signal from the sensor circuit to a capacitor element in the S/H stage to read-out and store the signal. The multiplexer circuit may include a switching-element coupled to an output node of the capacitor element to couple the signal to a column. The precharge circuit may include a switching-element coupled between the output node of the capacitor element and the column to precharge the capacitor element to a fixed voltage applied to the column when the S/H stage is not reading-out the signal.