Patents by Inventor Yannick DEGOT

Yannick DEGOT has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12225624
    Abstract: An electronic device includes a modulator-demodulator circuit, a first integrated circuit for implementing a first subscriber module; and a second integrated circuit for implementing a second subscriber identification module. A data transmit-receive terminal of the first integrated circuit and a data transmit-receive terminal of the second integrated circuit are connected to a data transmit-receive terminal of the modulator-demodulator circuit. Reset terminals of the modulator-demodulator circuit and the first integrated circuit are connected so that the modulator-demodulator circuit can control deactivation of the first integrated circuit. A reset terminal of the second integrated circuit and an input/output terminal of the first integrated circuit are connected so that the first integrated circuit can control deactivation of the second integrated circuit.
    Type: Grant
    Filed: December 10, 2021
    Date of Patent: February 11, 2025
    Assignee: STMicroelectronics (Rousset) SAS
    Inventor: Yannick Degot
  • Publication number: 20220191680
    Abstract: An electronic device includes a modulator-demodulator circuit, a first integrated circuit for implementing a first subscriber module; and a second integrated circuit for implementing a second subscriber identification module. A data transmit-receive terminal of the first integrated circuit and a data transmit-receive terminal of the second integrated circuit are connected to a data transmit-receive terminal of the modulator-demodulator circuit. Reset terminals of the modulator-demodulator circuit and the first integrated circuit are connected so that the modulator-demodulator circuit can control deactivation of the first integrated circuit. A reset terminal of the second integrated circuit and an input/output terminal of the first integrated circuit are connected so that the first integrated circuit can control deactivation of the second integrated circuit.
    Type: Application
    Filed: December 10, 2021
    Publication date: June 16, 2022
    Applicant: STMicroelectronics (Rousset) SAS
    Inventor: Yannick DEGOT