Patents by Inventor Yannick MONNET

Yannick MONNET has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Asynchronous circuit with sequential write operations
    Patent number: 9514081
    Abstract: The asynchronous circuit includes an input channel, a divergence operator connecting the input channel to a plurality of intermediate channels, a convergence operator gathering the intermediate channels into a single output channel, a main sequencer including a plurality of sequentially-activated control channels, each intermediate channel being associated to a control channel, and a switch arranged in a request path of one of the intermediate channels and connected to the last active control channel. The circuit further includes a memory circuit, arranged in each of the other intermediate channels, connected to the associated control channel and configured to transmit the request signal of the associated intermediate channel to the output channel and to modify an output state of the associated intermediate channel, by means of the main sequencer, without requiring any state change of the input channel.
    Type: Grant
    Filed: September 13, 2013
    Date of Patent: December 6, 2016
    Assignee: TIEMPO
    Inventors: Marc Renaudin, Alain Fonkoua, Yannick Monnet, Yassine Rjimati
  • ASYNCHRONOUS CIRCUIT WITH SEQUENTIAL WRITE OPERATIONS
    Publication number: 20140075084
    Abstract: The asynchronous circuit includes an input channel, a divergence operator connecting the input channel to a plurality of intermediate channels, a convergence operator gathering the intermediate channels into a single output channel, a main sequencer including a plurality of sequentially-activated control channels, each intermediate channel being associated to a control channel, and a switch arranged in a request path of one of the intermediate channels and connected to the last active control channel. The circuit further includes a memory circuit, arranged in each of the other intermediate channels, connected to the associated control channel and configured to transmit the request signal of the associated intermediate channel to the output channel and to modify an output state of the associated intermediate channel, by means of the main sequencer, without requiring any state change of the input channel.
    Type: Application
    Filed: September 13, 2013
    Publication date: March 13, 2014
    Inventors: Marc RENAUDIN, Alain FONKOUA, Yannick MONNET, Yassine RJIMATI