Patents by Inventor Yannis Papananos

Yannis Papananos has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10069662
    Abstract: A pulse width modulation system comprises an analog component and a digital component. The analog component operates to separate a local oscillator signal with different phase shifts and introduce an offset (i.e., a time delay) to analog signals being receive at an input with a tuning operation that fine tunes in the analog signals in the analog (continuous time) domain. The analog component comprises a plurality of analog delay lines that respectively process carrier signals having a different phase shifts. Digital delay lines convert the analog signals to digital square waves with the same time delay and at the same resolution as the analog output signal.
    Type: Grant
    Filed: November 10, 2015
    Date of Patent: September 4, 2018
    Assignee: Infineon Technologies AG
    Inventors: Yannis Papananos, David Seebacher, Nikolaos Alexiou, Franz Dielacher, Konstantinos Galanopoulos, Peter Singerl, Marc Tiebout
  • Patent number: 9800236
    Abstract: A pulse width modulation (PWM) system comprises an analog component and a digital component. The analog component introduces an offset (i.e., a time delay) to analog signals being received at an input with a tuning operation that fine tunes in the analog signals in the analog (continuous time) domain. The analog component comprises an analog delay line comprising a plurality of analog delay components configured to introduce the time delay to the analog signals based on a model of a transmission line.
    Type: Grant
    Filed: November 10, 2015
    Date of Patent: October 24, 2017
    Assignee: Infineon Technologies AG
    Inventors: Yannis Papananos, David Seebacher, Nikolaos Alexiou, Franz Dielacher
  • Publication number: 20170134194
    Abstract: A pulse width modulation system comprises an analog component and a digital component. The analog component operates to separate a local oscillator signal with different phase shifts and introduce an offset (i.e., a time delay) to analog signals being receive at an input with a tuning operation that fine tunes in the analog signals in the analog (continuous time) domain. The analog component comprises a plurality of analog delay lines that respectively process carrier signals having a different phase shifts. Digital delay lines convert the analog signals to digital square waves with the same time delay and at the same resolution as the analog output signal.
    Type: Application
    Filed: November 10, 2015
    Publication date: May 11, 2017
    Inventors: Yannis Papananos, David Seebacher, Nikolaos Alexiou, Franz Dielacher, Konstantinos Galanopoulos, Peter Singerl, Marc Tiebout
  • Publication number: 20170134015
    Abstract: A pulse width modulation (PWM) system comprises an analog component and a digital component. The analog component introduces an offset (i.e., a time delay) to analog signals being received at an input with a tuning operation that fine tunes in the analog signals in the analog (continuous time) domain. The analog component comprises an analog delay line comprising a plurality of analog delay components configured to introduce the time delay to the analog signals based on a model of a transmission line.
    Type: Application
    Filed: November 10, 2015
    Publication date: May 11, 2017
    Inventors: Yannis Papananos, David Seebacher, Nikolaos Alexiou, Franz Dielacher
  • Patent number: 8505193
    Abstract: Integrated high frequency balanced-to-unbalanced transformers and inductors suitable for operation in high frequencies, such as radio frequencies. Embodiments disclosed give consideration to issues related to the layout of the top and bottom inductors for the minimization of capacitive effects between layers and methods of manufacturing thereof. The manufacturing process comprises forming of a first winding in a first metal layer; forming an insulating layer over at least the first metal layer; forming of a second winding in a second metal layer such that the second winding path has both a vertical and a horizontal displacement to the first conductive path, preferably with an overlap that is less than a full overlap; and forming shunts to ensure continuity of each of the first and second windings.
    Type: Grant
    Filed: May 16, 2012
    Date of Patent: August 13, 2013
    Assignee: Theta Microelectronics, Inc.
    Inventor: Yannis Papananos
  • Publication number: 20120223176
    Abstract: Integrated high frequency balanced-to-unbalanced transformers and inductors suitable for operation in high frequencies, such as radio frequencies. Embodiments disclosed give consideration to issues related to the layout of the top and bottom inductors for the minimization of capacitive effects between layers and methods of manufacturing thereof. A displacement between the conductive paths of the top inductor and the bottom inductor is shown that provides for superior performance over prior art solutions.
    Type: Application
    Filed: May 16, 2012
    Publication date: September 6, 2012
    Applicant: THETA MICROELECTRONICS, INC.
    Inventor: Yannis Papananos
  • Patent number: 8183970
    Abstract: Integrated high frequency balanced-to-unbalanced transformers and inductors suitable for operation in high frequencies, such as radio frequencies. Embodiments disclosed give consideration to issues related to the layout of the top and bottom inductors for the minimization of capacitive effects between layers and methods of manufacturing thereof. A displacement between the conductive paths of the top inductor and the bottom inductor is shown that provides for superior performance over prior art solutions.
    Type: Grant
    Filed: October 4, 2010
    Date of Patent: May 22, 2012
    Assignee: Theta Microelectronics, Inc.
    Inventor: Yannis Papananos
  • Publication number: 20110018672
    Abstract: Integrated high frequency balanced-to-unbalanced transformers and inductors suitable for operation in high frequencies, such as radio frequencies. Embodiments disclosed give consideration to issues related to the layout of the top and bottom inductors for the minimization of capacitive effects between layers. A displacement between the conductive paths of the top inductor and the bottom inductor is shown that provides for superior performance over prior art solutions.
    Type: Application
    Filed: October 4, 2010
    Publication date: January 27, 2011
    Applicant: THETA MICROELECTRONICS, INC.
    Inventor: Yannis Papananos
  • Patent number: 7808356
    Abstract: Integrated high frequency balanced-to-unbalanced transformers and inductors suitable for operation in high frequencies, such as radio frequencies. Embodiments disclosed give consideration to issues related to the layout of the top and bottom inductors for the minimization of capacitive effects between layers. A displacement between the conductive paths of the top inductor and the bottom inductor is shown that provides for superior performance over prior art solutions.
    Type: Grant
    Filed: June 22, 2007
    Date of Patent: October 5, 2010
    Assignee: Theta Microelectronics, Inc.
    Inventor: Yannis Papananos
  • Patent number: 7554397
    Abstract: A predistortion method for CMOS Low-Noise-Amplifiers (LNAs) to be used in Broadband Wireless applications is presented. The method is based on the nulling of the third order Intermodulation distortion (IMD3) of the main amplifier by a highly nonlinear predistortion branch. Maximum third order product cancellation is ensured by a transformer feedback method. The technique improves linearity in a wide range of input power without significant gain and Noise Figure (NF) degradation. Simulation results on a 1-V LNA indicate a 10.3 dB improvement in the Input Third-Order Intercept Point (IIP3) with a reduction of only 1 dB and 0.44 dB in amplifier gain and NF respectively.
    Type: Grant
    Filed: May 10, 2007
    Date of Patent: June 30, 2009
    Assignee: Theta Microelectronics, Inc.
    Inventors: Georgios Vitzilaios, Yannis Papananos
  • Patent number: 7489192
    Abstract: A low-noise amplifier, that utilizes multiple monolithic transformer magnetic feedback to simultaneously neutralize the gate-drain overlap capacitance of the amplifying transistor and achieve high gain at high frequencies when driving an on-chip capacitance, is shown. The multiple transformer topology permits negative and positive feedback to be applied constructively, allowing for a stable design with adequate gain and large reverse isolation without Noise Figure degradation.
    Type: Grant
    Filed: May 14, 2007
    Date of Patent: February 10, 2009
    Assignee: Theta Microelectronics, Inc.
    Inventors: Georgios Vitzilaios, Yannis Papananos
  • Publication number: 20080100374
    Abstract: Programmable filters are used for the purpose of changing the filter cutoff frequency as may be necessary for the operation of a wireless transmitter or receiver. Frequencies may be changed by selecting a desirable value of a capacitor and/or a resistor. The programmable filter controls the frequency according to the disclosed method. Furthermore, in order to reduce the area consumed by the programmable filter a three-dimensional layout is used. In accordance with the disclosed invention it is possible to program the input of the programmable filter to have a higher or lower input resistance as may be required while maintaining the desired programmed cutoff frequency by switching the respective capacitors in a capacitor bank, thereby combining the elements needed for frequency programmability and input impedance level selection.
    Type: Application
    Filed: October 30, 2006
    Publication date: May 1, 2008
    Inventors: Yannis Papananos, Yannis Tsividis
  • Publication number: 20070290745
    Abstract: A low-noise amplifier, that utilizes multiple monolithic transformer magnetic feedback to simultaneously neutralize the gate-drain overlap capacitance of the amplifying transistor and achieve high gain at high frequencies when driving an on-chip capacitance, is shown. The multiple transformer topology permits negative and positive feedback to be applied constructively, allowing for a stable design with adequate gain and large reverse isolation without Noise Figure degradation.
    Type: Application
    Filed: May 14, 2007
    Publication date: December 20, 2007
    Inventors: Georgios Vitzilaios, Yannis Papananos
  • Publication number: 20070285162
    Abstract: A predistortion method for CMOS Low-Noise-Amplifiers (LNAs) to be used in Broadband Wireless applications is presented. The method is based on the nulling of the third order Intermodulation distortion (IMD3) of the main amplifier by a highly nonlinear predistortion branch. Maximum third order product cancellation is ensured by a transformer feedback method. The technique improves linearity in a wide range of input power without significant gain and Noise Figure. (NF) degradation. Simulation results on a 1-V LNA indicate a 10.3 dB improvement in the Input Third-Order Intercept Point (IIP3) with a reduction of only 1 dB and 0.44dB in amplifier gain and NF respectively.
    Type: Application
    Filed: May 10, 2007
    Publication date: December 13, 2007
    Inventors: Georgios Vitzilaios, Yannis Papananos
  • Publication number: 20070247269
    Abstract: Integrated high frequency balanced-to-unbalanced transformers and inductors suitable for operation in high frequencies, such as radio frequencies. Embodiments disclosed give consideration to issues related to the layout of the top and bottom inductors for the minimization of capacitive effects between layers. A displacement between the conductive paths of the top inductor and the bottom inductor is shown that provides for superior performance over prior art solutions.
    Type: Application
    Filed: June 22, 2007
    Publication date: October 25, 2007
    Inventor: Yannis Papananos
  • Patent number: 7253712
    Abstract: Integrated high frequency balanced-to-unbalanced transformers suitable for operation in high frequencies, such as radio frequencies. Embodiments disclosed give consideration to issues related to the layout of the primary and secondary inductors for the minimization of capacitive effects between layers while using a minimal number of metal layers. Two solutions are provided, one having embodiments with a symmetrical primary inductor in a 4-metal layer implementation and one having embodiments with a non-symmetrical primary inductor in a 3-metal layer implementation.
    Type: Grant
    Filed: August 22, 2005
    Date of Patent: August 7, 2007
    Assignee: Theta Microelectronics, Inc.
    Inventor: Yannis Papananos