Abstract: Methods and circuits for reducing power dissipation in wireless transceivers and other electronic circuits and systems. Embodiments of the present invention use bias current reduction, impedance scaling, and gain changes either separately or in combination to reduce power dissipation. For example, bias currents are reduced in response to a need for reduced signal handling capability, impedances are scaled thus reducing required drive and other bias currents in response to a strong received signal, or gain is increased and impedances are scaled in response to a low received signal in the presence of no or weak interfering signals.

Abstract: Methods and circuits for reducing power dissipation in wireless transceivers and other electronic circuits and systems. Embodiments of the present invention use bias current reduction, impedance scaling, and gain changes either separately or in combination to reduce power dissipation. For example, bias currents are reduced in response to a need for reduced signal handling capability, impedances are scaled thus reducing required drive and other bias currents in response to a strong received signal, or gain is increased and impedances are scaled in response to a low received signal in the presence of no or weak interfering signals.

Abstract: Methods and circuits for reducing power dissipation in wireless transceivers and other electronic circuits and systems. Embodiments of the present invention use bias current reduction, impedance scaling, and gain changes either separately or in combination to reduce power dissipation. For example, bias currents are reduced in response to a need for reduced signal handling capability, impedances are scaled thus reducing required drive and other bias currents in response to a strong received signal, or gain is increased and impedances are scaled in response to a low received signal in the presence of no or weak interfering signals.

Abstract: Methods and circuits for reducing power dissipation in wireless transceivers and other electronic circuits and systems. Embodiments of the present invention use bias current reduction, impedance scaling, and gain changes either separately or in combination to reduce power dissipation. For example, bias currents are reduced in response to a need for reduced signal handling capability, impedances are scaled thus reducing required drive and other bias currents in response to a strong received signal, or gain is increased and impedances are scaled in response to a low received signal in the presence of no or weak interfering signals.

Abstract: Methods and circuits for reducing power dissipation in wireless transceivers and other electronic circuits and systems. Embodiments of the present invention use bias current reduction, impedance scaling, and gain changes either separately or in combination to reduce power dissipation. For example, bias currents are reduced in response to a need for reduced signal handling capability, impedances are scaled thus reducing required drive and other bias currents in response to a strong received signal, or gain is increased and impedances are scaled in response to a low received signal in the presence of no or weak interfering signals.

Abstract: Methods and circuits for reducing power dissipation in wireless transceivers and other electronic circuits and systems. Embodiments of the present invention use bias current reduction, impedance scaling, and gain changes either separately or in combination to reduce power dissipation. For example, bias currents are reduced in response to a need for reduced signal handling capability, impedances are scaled thus reducing required drive and other bias currents in response to a strong received signal, or gain is increased and impedances are scaled in response to a low received signal in the presence of no or weak interfering signals.

Abstract: Methods and circuits for reducing power dissipation in wireless transceivers and other electronic circuits and systems. Embodiments of the present invention use bias current reduction, impedance scaling, and gain changes either separately or in combination to reduce power dissipation. For example, bias currents are reduced in response to a need for reduced signal handling capability, impedances are scaled thus reducing required drive and other bias currents in response to a strong received signal, or gain is increased and impedances are scaled in response to a low received signal in the presence of no or weak interfering signals.

Abstract: Methods and circuits for reducing power dissipation in wireless transceivers and other electronic circuits and systems. Embodiments of the present invention use bias current reduction, impedance scaling, and gain changes either separately or in combination to reduce power dissipation. For example, bias currents are reduced in response to a need for reduced signal handling capability, impedances are scaled thus reducing required drive and other bias currents in response to a strong received signal, or gain is increased and impedances are scaled in response to a low received signal in the presence of no or weak interfering signals.

Abstract: An improved integrator for use in physical analog-computing systems is disclosed, featuring real-time dynamic amplitude scaling schemas that make use of an injected correction factor responsive to a contemporaneous change in an input dynamic-amplitude-scaling compensation factor. The injected correction factor is designed to reduce or eliminate transient output perturbations due to the amplitude scaling change. The disclosures discussed have real-world applications for physical analog computers and hybrid computers used to control and manage many types of industrial-control systems.

Abstract: The inventive disclosures described herein generally pertain to an improved runtime-calibratable analog-computing system. In many embodiments, the improved analog-computing system comprises at least two analog computers, wherein after initial calibration, the system is designed to stagger the runtime calibration modes of each of the at least two analog-computers such that at least one of the analog computers is always in service, thus preventing any downtime for the overall system. In other words, a system user sees one initial calibration, and computing by the overall system is never interrupted.

Abstract: The inventive disclosures described herein generally pertain to an improved runtime-calibratable analog-computing system. In many embodiments, the improved analog-computing system comprises at least two analog computers, wherein after initial calibration, the system is designed to stagger the runtime calibration modes of each of the at least two analog-computers such that at least one of the analog computers is always in service, thus preventing any downtime for the overall system. In other words, a system user sees one initial calibration, and computing by the overall system is never interrupted.

Abstract: An improved integrator for use in physical analog-computing systems is disclosed, featuring real-time dynamic amplitude scaling schemas that make use of an injected correction factor responsive to a contemporaneous change in an input dynamic-amplitude-scaling compensation factor. The injected correction factor is designed to reduce or eliminate transient output perturbations due to the amplitude scaling change. The disclosures discussed have real-world applications for physical analog computers and hybrid computers used to control and manage many types of industrial-control systems.

Abstract: Methods and circuits for reducing power dissipation in wireless transceivers and other electronic circuits and systems. Embodiments of the present invention use bias current reduction, impedance scaling, and gain changes either separately or in combination to reduce power dissipation. For example, bias currents are reduced in response to a need for reduced signal handling capability, impedances are scaled thus reducing required drive and other bias currents in response to a strong received signal, or gain is increased and impedances are scaled in response to a low received signal in the presence of no or weak interfering signals.

Abstract: Methods and circuits for reducing power dissipation in wireless transceivers and other electronic circuits and systems. Embodiments of the present invention use bias current reduction, impedance scaling, and gain changes either separately or in combination to reduce power dissipation. For example, bias currents are reduced in response to a need for reduced signal handling capability, impedances are scaled thus reducing required drive and other bias currents in response to a strong received signal, or gain is increased and impedances are scaled in response to a low received signal in the presence of no or weak interfering signals.

Abstract: A system and method are described permitting a sophisticated control of a battery composed of a multiplicity of three-terminal electrochemical cells. Each cell has first and second terminals, connected with respective electrodes, one of which is a positive terminal and one of which is a negative terminal. Each cell has a third terminal connected with a grid electrode. A battery is composed of N cells. For each of the N cells, there is provided a respective capacitor switchably coupled to the second and third terminals thereof. A controller is connected through a switching matrix to the capacitors. In operation, the controller is connected sequentially to each capacitor among the multiplicity of capacitors, during which time the capacitor is momentarily uncoupled from its respective cell. When the controller is connected to one of the capacitors, it measures the voltage thereupon. The controller can then charge up or discharge the capacitor to drive it to a desired voltage level.

Abstract: A method and apparatus to compensate for distortion of a waveform due to the skin effect in a current shunt. The method includes modeling the complex impedance of the shunt as component complex impedances. By designing a filter corresponding to the component complex impedances, the distortion of a waveform across the shunt may be reversed to provide an accurate replica of the undistorted waveform.

Abstract: An arrangement provides simulation of important battery factors such as state of charge or state of health, and the estimates are provided to the human user in ways that permit the human user to make better use of the battery, for example in an electric car. The arrangement is made up in part of nodes, each individually simulated, and at least some of the nodes communicate with each other by means of values which within the domain of the simulator are understood as currents but which may have real-world significance for some value that is not a current at all. The currents are passed on a (simulated) analog bus. Some lines on the analog bus, while understood as “currents” in the domain of the simulator, are actually values that merely pass messages between modeling elements, the “current” values not necessarily representing any real-life measurable such as the aforementioned temperature value.

Abstract: Disclosed herein are some continuous time systems and methods. Some of the disclosed systems and methods use a continuous-time analog-to-digital converter (ADC) configured to receive an analog input and to generate an ADC output, a continuous-time digital signal processor configured to receive the ADC output and generate one or more digital outputs, one or more digital-to-analog converters configured to receive the one or more digital outputs, each digital-to-analog converter configured to receive a corresponding digital output and generate an analog output, and an adder configured to receive the analog outputs of the one or more digital-to-analog converters and to generate a summed analog output.

Abstract: Continuous-time digital systems implemented with separate timing paths and data paths are disclosed. The disclosed continuous-time digital systems, can implement an event-grouping and detection method that can be used feedback systems with propagation delays. By implementing event-detection into a feedback loop of a continuous-time digital system, the system can automatically stop when there is no event in the system. When new events are detected the system can commence operation.

Abstract: Processes, methods and circuits for improving battery life by reducing the battery power-drain of battery-powered devices using wireless transceivers is disclosed. Embodiments of the present invention provide for dynamically changing the bias current, impedance, and gain, either separately or in combination, during circuit operation to optimize or to reduce power dissipation. The dynamic variations may be implemented by varying the value of a resistance and/or a capacitance by opening switches across one or more portions of the resistance. Also, the dynamic variations may include setting any of the gain, bias current, or impedance parameters of the receiver circuit in between a high and low level, followed by adjusting the parameter up or down in response to a desired signal and an interferer signal.