Patents by Inventor Yanping Ding

Yanping Ding has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240336692
    Abstract: Disclosed is an antibody that specifically binds to BCMA. The antibody comprises a heavy chain variable domain VH, a light chain variable domain VL, and a chimeric antigen receptor that contains the sequence thereof. Further disclosed are the amino acid sequence, a vector, a host cell, and a composition of the antibody or the chimeric antigen receptor of the present invention. Also disclosed is a use of the antibody or the chimeric antigen receptor in the preparation of a drug for the prevention or treatment of diseases.
    Type: Application
    Filed: December 30, 2021
    Publication date: October 10, 2024
    Applicants: BEIJING IMMUNOCHINA PHARMACEUTICALS CO., LTD, BEIJING YIMIAOYILIAO CO., LTD
    Inventors: Xinan LU, Ting HE, Feifei QI, Yanping DING, Guanghua LIU, Xuelian HU, Wenping XU
  • Publication number: 20230346937
    Abstract: The present invention relates to the optimization of a chimeric antigen receptor, in particular, the modification am intracellular co-stimulatory domain.
    Type: Application
    Filed: February 9, 2021
    Publication date: November 2, 2023
    Applicant: BEIJING IMMUNOCHINA PHARMACEUTICALS CO., LTD.
    Inventors: Xinan LU, Ting HE, Feifei QI, Yanping DING, Fuyin XIONG, Mengmeng LIANG
  • Publication number: 20230340063
    Abstract: The present invention relates to the optimization of a chimeric antigen receptor, in particular, the modification of an intracellular signaling domain.
    Type: Application
    Filed: February 9, 2021
    Publication date: October 26, 2023
    Applicant: BEIJING IMMUNOCHINA PHARMACEUTICALS CO., LTD.
    Inventors: Feifei QI, Ting HE, Xinan LU, Yanping DING, Fuyin XIONG, Mengmeng LIANG
  • Patent number: 8963613
    Abstract: A current mirror circuit is described. The current mirror circuit includes a first transistor and a second transistor. The gates of the first transistor and the second transistor are coupled at a bias voltage. The current mirror circuit also includes an auxiliary transistor that is biased into weak inversion by receiving the bias voltage at a gate of the auxiliary transistor after being reduced by an offset voltage. The sources of the first transistor, second transistor and auxiliary transistor are coupled together. A primary current from the drain of the second transistor is combined with an auxiliary current from the drain of the auxiliary transistor to produce an output current.
    Type: Grant
    Filed: July 17, 2012
    Date of Patent: February 24, 2015
    Assignee: QUALCOMM Incorporated
    Inventors: Manas Behera, Yanping Ding, Junxiong Deng
  • Publication number: 20130038384
    Abstract: A current mirror circuit is described. The current mirror circuit includes a first transistor and a second transistor. The gates of the first transistor and the second transistor are coupled at a bias voltage. The current mirror circuit also includes an auxiliary transistor that is biased into weak inversion by receiving the bias voltage at a gate of the auxiliary transistor after being reduced by an offset voltage. The sources of the first transistor, second transistor and auxiliary transistor are coupled together. A primary current from the drain of the second transistor is combined with an auxiliary current from the drain of the auxiliary transistor to produce an output current.
    Type: Application
    Filed: July 17, 2012
    Publication date: February 14, 2013
    Applicant: QUALCOMM INCORPORATED
    Inventors: Manas Behera, Yanping Ding, Junxiong Deng