Abstract: The present disclosure provides a display panel driving method, a display panel and a display device, the method comprising: comprising alternately configure display time periods and touch time periods in one time frame, at least one touch time period being configured, and at least two display time periods being configured; sequentially scanning in each display time period a portion of gate lines in a display panel; and pausing in each touch time period the scanning of all gate lines, and performing touch recognition, wherein in a display time period adjacent to a touch time period, level compensation is performed on a gate line to be compensated, and the gate line to be compensated is at least one gate line that starts to scan in the display time period adjacent to the touch time period.

Abstract: The disclosure provides a display device and a holographic display apparatus. The display device includes a display panel including a first linear polarizer located on a light-emitting side, so that the display panel emits linearly polarized image light; and a phase modulation panel disposed on the light-emitting side of the display panel and configured to perform phase modulation on the linearly polarized image light. The holographic display apparatus includes the display device.

Abstract: A display driving method and a display device are provided. The display driving method includes: scanning a plurality of subpixels arranged in an N?M array row by row or in multiple rows to turn on each row of scanned subpixels, so that the duration when two adjacent rows of subpixels are simultaneously in a turn-on state is greater than or equal to two times a unit scan time, the unit scan time being the time required for scanning one row of subpixels, and N and M both being integers greater than 1; and applying data signals to at least two rows of subpixels that are simultaneously in the turn-on state, so that the duration when data signals are applied to at least some rows of subpixels is greater than the unit scan time.

Abstract: The present disclosure relates to a touch display device and a driving method for the touch display device. The touch display device comprises data lines, gate lines, pixel electrodes located within display areas defined by the data lines and the gate lines, and a driving circuit. The driving circuit is configured to provide a first display data signal to the data lines during a display stage of the touch display device, and is configured to provide a second display data signal to the data lines during a predetermined period adjacent to the display stage within a touch stage of the touch display device, and provide an off-signal to the gate lines during the predetermined period such that the second display data signal is not provided to the pixel electrodes.

Abstract: A display substrate, including: a base substrate; a plurality of data lines on the base substrate; a first insulating layer on a side of the plurality of data lines away from the base substrate; a plurality of gate lines on a side of the first insulating layer away from the plurality of data lines, where extension directions of the gate and data lines are intersected; a second insulating layer on a side of the plurality of gate lines away from the first insulating layer; and a first electrode on a side of the second insulating layer away from the plurality of gate lines, where at least a portion of an orthographic projection of the first electrode on the base substrate is within an region surrounded by orthographic projections of two adjacent data lines on the base substrate and orthographic projections of two adjacent gate lines on the base substrate.

Abstract: A display panel, a driving method for the display panel and a display device. The display panel includes a gate driving circuit, the gate driving circuit includes shift registers of a plurality of stages arranged in sequence, the shift registers of the plurality of stages arranged in sequence are combined into N groups of gate driving sub-circuits, and shift registers in the N groups of gate driving sub-circuits are cascaded, respectively; an m-th group of gate driving sub-circuits in the N groups of gate driving sub-circuits includes a shift register of an m-th stage and a shift register of an (m+L*N)-th stage that are cascaded, where m is an integer that is greater than or equal to 1 and less than or equal to N.

Abstract: The present disclosure provides a display panel and a manufacturing method therefor, and a display apparatus, which relate to the technical field of displaying. The display panel includes a first base plate and a second base plate which are aligned with each other; the first base plate includes a first substrate and a thin film transistor; the thin film transistor includes an active layer; an optical adjustment layer is disposed on the second base plate; an orthographic projection of the optical adjustment layer on the first substrate overlaps with an orthographic projection of the active layer on the first substrate. That is, the optical adjustment layer corresponds to the active layer. In a laminating direction of the display panel, the existence of the optical adjustment layer with a certain height enables a reflecting surface of the second base plate to be closer to the first base plate.

Abstract: An array substrate, including: a base substrate, and a plurality of first signal lines, a plurality of second signal lines, a plurality of touch-control signal lines, a first transparent conductive layer and a second transparent conductive layer, which are arranged on the base substrate. The first transparent conductive layer and the second transparent conductive layer are located on the side of the touch-control signal lines that is away from the base substrate. The touch-control signal lines are connected to at least one touch-control sensing block, which includes a plurality of touch-control electrodes connected to each other and spaced apart from each other; and the first transparent conductive layer or the second transparent conductive layer includes the plurality of touch-control electrodes. The plurality of first signal lines and the plurality of second signal lines intersect to form a plurality of sub-pixel regions, which include opening regions.

Abstract: The present disclosure provides an array substrate and a display device. The array substrate includes one start data line, N?1 intermediate data line and one end data line. The array substrate further includes a first driving circuit and a second driving circuit, the first driving circuit is arranged at a first side of the plurality of data lines, and the second driving circuit is arranged at a second side of the plurality of data lines opposite to the first side in a first direction. The first driving circuit is electrically connected to the first end of each of the plurality of data lines. The first driving circuit is electrically coupled to first ends of the plurality of data lines, a first end of the end data line is electrically coupled to a first end of the start data line, and the second driving circuit is electrically coupled to second ends of the plurality of data lines.

Abstract: A driving circuit, a display device, and a driving method are disclosed. The driving circuit includes a level conversion unit and a gate electrode driving unit; and the gate electrode driving unit is configured to sequentially shift and output a plurality of first gate scan signals by a first portion of the 2n gate signal output terminals in response to a first portion of the plurality of first output signals received at a first moment by a first portion of the plurality of second clock signal input terminals, and sequentially output a plurality of second gate scan signals by a second portion of the 2n gate signal output terminals in response to a second portion of the plurality of first output signals received at a second moment by a second portion of the plurality of second clock signal input terminals.

Abstract: A driving method for a display panel and a display apparatus. The driving method includes: acquiring display data of a to-be-displayed image in a current display frame (S100); and loading a data voltage on a data line in the display panel according to the display data, such that each sub-pixel in the display panel is charged with the corresponding data voltage (S200).

Abstract: A signal processing method, a display apparatus, an electronic device and a computer-readable storage medium are provided. The signal processing method for a display apparatus, the display apparatus includes a display substrate, the display substrate includes M rows and N columns of pixel units arranged in an array, and the signal processing method includes: acquiring display data of a frame of an image to be displayed, wherein the display data include P rows and Q columns of pixel data arranged in an array; generating P rows of gate scan signals corresponding to the P rows of pixel data; in a case where P is less than M, generating M-P rows of supplementary gate scan signals based on the P rows of gate scan signals; and driving the M rows of pixel units using the M rows of gate scan signals, respectively, P, Q, M and N are all positive integers.

Abstract: The embodiments of the present disclosure provide a drive control circuit, a control method thereof, and a display apparatus. The drive control circuit includes: a first control circuit configured to acquire image data, and output a first selection command signal according to the image data; and at least one second control circuit each coupled to at least one scan signal line in a display panel and coupled to the first control circuit. The at least one second control circuit is configured to receive the first selection command signal, determine, according to the first selection command signal, a target scan signal line from among scan signal lines in the display panel, and output a scan drive signal to the target scan signal line.

Abstract: A driving method for a display panel and a display apparatus. The driving method includes: obtaining original display data of a current display frame; and when it is determined to adopt a first driving mode, loading first gate scanning signals (GA1_1-GA12_1) to gate lines (GA, GA1-GA12) in the display panel, and loading a data voltage to data lines (DA, DA1-DA7) in the display panel according to target display data obtained by removing a part of data from the original display data, so as to charge each sub-pixel in the display panel with the data voltage.

Abstract: An array substrate and a display panel are described. The array substrate may include a first base; a plurality of pixel units arrayed on the first base in a row direction and a column direction; each of the pixel units comprising at least two sub-pixels arranged in the row direction; a plurality of first scanning lines sequentially arranged on the first base in the column direction, at least one first scanning line being arranged at a side of each row of pixel units in the column direction, the first scanning lines being connected with the sub-pixels; and a plurality of second scanning lines sequentially arranged on the first base in the row direction, at least one second scanning line being arranged at a side of each column of pixel units in the row direction.

Abstract: A display panel, a driving method for the display panel and a display device. The display panel includes a gate driving circuit, the gate driving circuit includes shift registers of a plurality of stages arranged in sequence, the shift registers of the plurality of stages arranged in sequence are combined into N groups of gate driving sub-circuits, and shift registers in the N groups of gate driving sub-circuits are cascaded, respectively; an m-th group of gate driving sub-circuits in the N groups of gate driving sub-circuits comprises a shift register of an m-th stage and a shift register of an (m+L*N)th stage that are cascaded, where m is an integer that is greater than or equal to 1 and less than or equal to N, L is an integer that is greater than or equal to 1, N is an even number that is greater than or equal to 2.

Abstract: A display substrate, including: a base substrate; a plurality of data lines on the base substrate; a first insulating layer on a side of the plurality of data lines away from the base substrate; a plurality of gate lines on a side of the first insulating layer away from the plurality of data lines, where extension directions of the gate and data lines are intersected; a second insulating layer on a side of the plurality of gate lines away from the first insulating layer; and a first electrode on a side of the second insulating layer away from the plurality of gate lines, where at least a portion of an orthographic projection of the first electrode on the base substrate is within an region surrounded by orthographic projections of two adjacent data lines on the base substrate and orthographic projections of two adjacent gate lines on the base substrate.

Abstract: The present disclosure relates to the field of display technology, in particular, to an array substrate and a display device. The array substrate includes: a first substrate; a transistor, formed on the first substrate; an organic insulation layer, formed on the first substrate and covering the transistor; a spacer, formed on a side of the organic insulation layer away from the first substrate, where an orthographic projection of the spacer on the first substrate at least partially overlaps with an orthographic projection of the transistor on the first substrate.

Abstract: At least one chip group and a group of first PLG wirings corresponding to each of the chip groups are disposed in a first bonding area, each of the chip groups includes at least two groups of chip units, each group of the chip units includes at least one gate drive chip, each group of the first PLG wirings includes a first wiring and at least one second wiring; power pins of any two adjacent gate drive chips are connected by the first wiring, each of the second wirings surrounds and passes through each of the gate drive chips, the first wirings connected with the power pin of the last gate drive chip in the previous group of the chip units and any of the second wirings, are parallelly connected with the power pin of the first gate drive chip in the next group of the chip units.

Abstract: A dual gate array substrate includes a plurality of groups of dual gate lines, a plurality of data lines, a plurality of pixel pairs and a plurality of common electrode lines, each common electrode line is arranged between two pixel units in a same pixel pair; and a layer where the common electrode line is located and a layer where a source/drain electrode of a thin film transistor is located are different layers and insulated from each other.