Patents by Inventor Yanwu Wang

Yanwu Wang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240096833
    Abstract: A semiconductor structure and a method for manufacturing the same are disclosed. The semiconductor structure includes a substrate, a chip stack disposed on the substrate through a plurality of first conductive structures. Each of the plurality of the first conductive structures includes a first conductive bump, and the first conductive bump includes at least one concave surface. Concave surfaces of adjacent first conductive bumps are disposed facing each other.
    Type: Application
    Filed: November 16, 2023
    Publication date: March 21, 2024
    Inventors: Yuan FANG, Yanwu WANG
  • Publication number: 20240096853
    Abstract: A semiconductor structure includes a plurality of dies. The plurality of dies are stacked sequentially along a first direction. The first direction is a direction perpendicular to a plane of the dies. Each of the dies includes a base and n first conductive structures penetrating the base along the first direction, where n is greater than or equal to 2. In at least one group of the corresponding first conductive structures in the dies, projections of the group of the first conductive structures in two adjacent layers of the dies along the first direction are not overlapped with each other.
    Type: Application
    Filed: November 30, 2023
    Publication date: March 21, 2024
    Applicant: CHANGXIN MEMORY TECHNOLOGIES, INC.
    Inventors: Yuan FANG, Yanwu WANG
  • Publication number: 20240096754
    Abstract: A semiconductor structure includes a base, a chip stack located on the base, and first conductive structures. The chip stack includes chips stacked in sequence in a direction perpendicular to a plane of the base, a chip includes first and second sub-portions, a first surface of the first sub-portion is flush with that of the second sub-portion, a second surface of the first sub-portion protrudes from that of the second sub-portion, and the first and second surfaces are oppositely arranged. A first conductive structure includes a first conductive bump and a first through-silicon via, the first conductive bump is located between first sub-portions of two adjacent chips, the first through-silicon via penetrates through the first sub-portion in the direction perpendicular to the plane of the base and is connected to the first conductive bump, and the materials of the first conductive bump and the first through-silicon via are same.
    Type: Application
    Filed: August 8, 2023
    Publication date: March 21, 2024
    Inventors: Yuan FANG, Yanwu WANG
  • Patent number: 11773302
    Abstract: Disclosed are a soft solvent-free flame-retardant polyurethane synthetic leather and a preparation method therefor. The soft solvent-free flame-retardant polyurethane synthetic leather comprises an antifouling layer, a surface layer, an intermediate layer, a bonding layer and a base cloth in sequence from top to bottom, wherein the bonding layer is prepared from component A and an isocyanate; the molar ratio of —NCO in the isocyanate to —OH in the component A is 0.85-0.93; and the component A is composed of a polyhydric alcohol, an inhibition-type catalyst, a flame retardant, a filler and a viscosity modifier in parts by weight.
    Type: Grant
    Filed: December 19, 2018
    Date of Patent: October 3, 2023
    Assignee: ANHUI ANLI MATERIAL TECHNOLOGY CO., LTD.
    Inventors: Heping Yao, Yuanzhou Song, Yanwu Wang, Wanli Huang, Yifeng Wang, Kejian Yao, Ruilin Wang, Sen Wang, Yundong Luo, Yongzhi Chen
  • Patent number: 11740275
    Abstract: A method for intelligent fault detection and location of a power distribution network is provided, which includes: constructing a network topology of the power distribution network, updating the network topology in real time to obtain an updated network topology, performing a fault identification based on the updated network topology, performing a fault locating based on the updated network topology to determine a fault node, and identifying a fault type based on a fault recorded signal of the fault node. With this method, fault locations and fault types of the power distribution network can be accurately detected in real time.
    Type: Grant
    Filed: September 16, 2021
    Date of Patent: August 29, 2023
    Assignee: HUNAN UNIVERSITY OF SCIENCE AND TECHNOLOGY
    Inventors: Chaoyang Chen, Yong Xiao, Ming Chi, Li Ding, Yanwu Wang, Zuguo Chen, Pei Li, Juan Chen, Bowen Zhou
  • Publication number: 20230083078
    Abstract: A method for intelligent fault detection and location of a power distribution network is provided, which includes: constructing a network topology of the power distribution network, updating the network topology in real time to obtain an updated network topology, performing a fault identification based on the updated network topology, performing a fault locating based on the updated network topology to determine a fault node, and identifying a fault type based on a fault recorded signal of the fault node. With this method, fault locations and fault types of the power distribution network can be accurately detected in real time.
    Type: Application
    Filed: September 16, 2021
    Publication date: March 16, 2023
    Inventors: Chaoyang Chen, Yong Xiao, Ming Chi, Li Ding, Yanwu Wang, Zuguo Chen, Pei Li, Juan Chen, Bowen Zhou
  • Publication number: 20230007849
    Abstract: Embodiments relate to the field of semiconductors, and provide a semiconductor device and a storage system. The semiconductor device includes a first printed circuit board and a capacitor structure positioned on the first printed circuit board. The first printed circuit board includes a plurality of memories arranged in sequence along a first direction, and each of the memories has a first power terminal and a first ground terminal. The capacitor structure includes a plurality of capacitors, and each of the capacitors has a second power terminal corresponding to the first power terminal and a second ground terminal corresponding to the first ground terminal, wherein the first power terminal is electrically connected to the second power terminal, and the first ground terminal is electrically connected to the second ground terminal. The semiconductor device can at least solve a problem of capacitor arrangement space, which is advantageous to optimizing power quality.
    Type: Application
    Filed: September 26, 2022
    Publication date: January 12, 2023
    Inventors: Yanwu WANG, Huifang DAI, Yade FANG
  • Publication number: 20220033694
    Abstract: Disclosed are a soft solvent-free flame-retardant polyurethane synthetic leather and a preparation method therefor. The soft solvent-free flame-retardant polyurethane synthetic leather comprises an antifouling layer, a surface layer, an intermediate layer, a bonding layer and a base cloth in sequence from top to bottom, wherein the bonding layer is prepared from component A and an isocyanate; the molar ratio of —NCO in the isocyanate to —OH in the component A is 0.85-0.93; and the component A is composed of a polyhydric alcohol, an inhibition-type catalyst, a flame retardant, a filler and a viscosity modifier in parts by weight. Disclosed are a soft solvent-free flame-retardant polyurethane synthetic leather and a preparation method therefor.
    Type: Application
    Filed: December 19, 2018
    Publication date: February 3, 2022
    Inventors: Heping YAO, Yuanzhou SONG, Yanwu WANG, Xinru SUN, Wanli HUANG, Yifeng WANG, Kejian YAO, Ruilin WANG, Sen WANG, Yundong LUO, Yongzhi CHEN
  • Patent number: 10781269
    Abstract: A nacre-mimetic environmentally friendly composite membrane with an “interpenetrating petal” structure and a preparation method thereof. Materials for preparing the composite membrane include magadiite, CMC and a bis-silane coupling agent. The composite membrane according to the present invention has an “interpenetrating petal” stable structure with non-parallel petal-shaped lamellar structure. In addition, inorganic sheets intersperse with each other to form an interlock.
    Type: Grant
    Filed: June 28, 2017
    Date of Patent: September 22, 2020
    Assignee: SOUTH CHINA UNIVERSITY OF TECHNOLOGY
    Inventors: Mingliang Ge, Mingyi Du, Yanwu Wang
  • Publication number: 20190345264
    Abstract: A nacre-mimetic environmentally friendly composite membrane with an “interpenetrating petal” structure and a preparation method thereof. Materials for preparing the composite membrane include magadiite, CMC and a bis-silane coupling agent. The composite membrane according to the present invention has an “interpenetrating petal” stable structure with non-parallel petal-shaped lamellar structure. In addition, inorganic sheets intersperse with each other to form an interlock.
    Type: Application
    Filed: June 28, 2017
    Publication date: November 14, 2019
    Applicant: SOUTH CHINA UNIVERSITY OF TECHNOLOGY
    Inventors: Mingliang GE, Mingyi DU, Yanwu WANG
  • Publication number: 20140331232
    Abstract: Disclosed are a portable multimedia device and an operating method therefor. The portable multimedia device comprises a Flash decoder and a system function decoder.
    Type: Application
    Filed: August 30, 2012
    Publication date: November 6, 2014
    Applicant: SHANGHAI ACTIONS SEMICONDUCTOR CO., LTD.
    Inventors: Yanwu Wang, Shutai Yao