Abstract: A light-emitting diode chip, a manufacturing method thereof, and a display are provided. The light-emitting diode chip includes a first epitaxial light-emitting structure; a reflective layer at a side of the first epitaxial light-emitting structure; a second epitaxial light-emitting structure located at a side of the reflective layer which faces away from the first epitaxial light-emitting structure; and a first polar electrode and a second polar electrode electrically connecting semiconductor layers having first polarities and semiconductor layers having second polarities in the first epitaxial light-emitting structure and the second epitaxial light-emitting structure, respectively.

Abstract: A display substrate and a display panel are provided. The display substrate includes: a base including a front surface, a back surface and a side surface; a driving circuit layer disposed on the front surface; a back electrode disposed on the back surface; a side printed wire electrically connected to the driving circuit layer, the side printed wire extends to the back electrode from the side surface and is electrically connected to the back electrode, the side printed wire includes a wire top portion located on a side of the driving circuit layer facing away from the base; and a bonding adhesive layer disposed overlying the side of the driving circuit layer facing away from the base, the bonding adhesive layer is further in contact with and covers the wire top portion. The display substrate and the display panel can solve a problem of excessive height in a non-display area.

Abstract: A pixel circuit of the present invention includes a thin-film transistor, a first scan line, a second scan line, and a data line. The first scan line is arranged along a first direction. The first scan line is electrically connected to the thin-film transistor. The second scan line is arranged along a second direction. The second scan line is electrically connected to the first scan line. The second direction is perpendicular to the first direction. The data line is arranged along the second direction. The data line is electrically connected to the thin-film transistor. The pixel circuit also includes an auxiliary scan line. The auxiliary scan line is arranged along the second direction. Two ends of the auxiliary scan line are electrically connected to the second scan line.

Abstract: A pixel circuit of the present invention includes a thin-film transistor, a first scan line, a second scan line, and a data line. The first scan line is arranged along a first direction. The first scan line is electrically connected to the thin-film transistor. The second scan line is arranged along a second direction. The second scan line is electrically connected to the first scan line. The second direction is perpendicular to the first direction. The data line is arranged along the second direction. The data line is electrically connected to the thin-film transistor. The pixel circuit also includes an auxiliary scan line. The auxiliary scan line is arranged along the second direction. Two ends of the auxiliary scan line are electrically connected to the second scan line.

Abstract: The present invention provides an array substrate and a display panel. The array substrate includes a substrate, a first metal layer, a second metal layer, a pixel electrode layer, and an alignment identification terminal that are sequentially stacked. The alignment identification terminal is disposed in at least one of the first metal layer and the second metal layer, and is at least partially disposed in a sub-pixel electrode region. An arrangement of the alignment identification terminal is no longer limited by a narrow frame, and a size can be made larger to meet the needs of a CCD identification, ensuring an accuracy of identification and alignment.

Abstract: A display substrate and a display panel are provided. The display substrate includes: a base including a front surface, a back surface and a side surface; a driving circuit layer disposed on the front surface; a back electrode disposed on the back surface; a side printed wire electrically connected to the driving circuit layer, the side printed wire extends to the back electrode from the side surface and is electrically connected to the back electrode, the side printed wire includes a wire top portion located on a side of the driving circuit layer facing away from the base; and a bonding adhesive layer disposed overlying the side of the driving circuit layer facing away from the base, the bonding adhesive layer is further in contact with and covers the wire top portion. The display substrate and the display panel can solve a problem of excessive height in a non-display area.

Abstract: The present disclosure provides a display panel and a liquid crystal display device. The display panel includes an array substrate and a flexible thin film. The array substrate has a first surface, a second surface disposed opposite to and in parallel with the first surface, and a first side surface connected to the first surface and the second surface. The first surface of the array substrate is on a same side as a light-emitting surface of the array substrate, and the flexible thin film is disposed on a side of the second surface of the array substrate. The display panel and the liquid crystal display device have narrow frames.

Abstract: The disclosure provides a bonding structure of a lateral side of a display panel, including an array substrate, a color filter, an inner circuit, and a lateral circuit. By defining a through hole in a gate insulating layer, a second metal layer may be directly connected to a first metal layer, thereby reducing layers flaked off from a glass when a lateral side of the glass is edged.

Abstract: The present disclosure provides a display panel and a liquid crystal display device. The display panel includes an array substrate and a flexible thin film. The array substrate has a first surface, a second surface disposed opposite to and in parallel with the first surface, and a first side surface connected to the first surface and the second surface. The first surface of the array substrate is on a same side as a light-emitting surface of the array substrate, and the flexible thin film is disposed on a side of the second surface of the array substrate. The display panel and the liquid crystal display device have narrow frames.

Abstract: The disclosure provides a bonding structure of a lateral side of a display panel, including an array substrate, a color filter, an inner circuit, and a lateral circuit. By defining a through hole in a gate insulating layer, a second metal layer may be directly connected to a first metal layer, thereby reducing layers flaked off from a glass when a lateral side of the glass is edged.

Abstract: An ultra-narrow frame display panel includes a display area and a frame area surrounding the display area. The display panel includes an array substrate and a color filter substrate disposed corresponding to each other. A sealant and a retaining wall structure configured to limit the sealant are disposed between the array substrate and the color filter substrate in the frame area. The retaining wall structure is closely attached to the sealant.

Abstract: The present invention provides an array substrate and a display panel. The array substrate includes a substrate, a first metal layer, a second metal layer, a pixel electrode layer, and an alignment identification terminal that are sequentially stacked. The alignment identification terminal is disposed in at least one of the first metal layer and the second metal layer, and is at least partially disposed in a sub-pixel electrode region. An arrangement of the alignment identification terminal is no longer limited by a narrow frame, and a size can be made larger to meet the needs of a CCD identification, ensuring an accuracy of identification and alignment.

Abstract: A display panel and manufacturing method for the same. The display panel includes an array substrate, a passivation layer, an organic planarization layer, a first color resist layer and a second color resist layer and an organic planarization layer. Each sub-pixel circuit includes at least two thin-film transistors; at least two via holes are prepared on the passivation layer and the organic planarization layer. The first color resist layer includes a first color resist region and multiple second color resist regions connected thereto. A projection of the first color resist region on the array substrate is located at two sides of the sub-pixel circuit. Each second color resist region is located above the at least two thin-film transistors; the second color resist layer is stacked above the second color resist region. The first color resist layer will not crack, and the main region spacer can reach a desired height.

Abstract: This invention discloses a pixel structure comprising: a scan line, and a data line, being crossed with the scan line to define a pixel unit. The pixel unit comprises a pixel electrode including a main body portion and a peripheral portion; a pixel driving element; and a common electrode disposed in an overlay structure with the pixel electrode. The common electrode forms a storage capacitor with the pixel electrode, and includes an outside portion adjacent to the data or scan line. The pixel electrode further includes an extension portion located outside the peripheral portion. The extension portion electrically connects the peripheral portion and forms an evading hole therebetween. The outside portion of the common electrode corresponds to the evading hole. The present invention further discloses a liquid crystal display panel. This invention has advantages of increasing the capacity of the storage capacitor and improving the parasitic capacitance and dark veins.

Abstract: A liquid crystal display panel is provided. The panel includes multiple scanning lines and multiple data lines on an array substrate, wherein a top of the data lines is covered with a light-shading electrode line; wherein the multiple scanning lines and the multiple data lines are intersected to define multiple pixel regions, and each pixel region is provided with a pixel electrode; and wherein the pixel electrode is provided with a notch at a corner adjacent to the light-shielding electrode line. The invention can improve the contrast of the panel, and the light leakage in the dark state will not occur at the corners of the pixel electrode.

Abstract: A display panel and manufacturing method for the same. The display panel includes an array substrate, a passivation layer, an organic planarization layer, a first color resist layer and a second color resist layer and an organic planarization layer. Each sub-pixel circuit includes at least two thin-film transistors; at least two via holes are prepared on the passivation layer and the organic planarization layer. The first color resist layer includes a first color resist region and multiple second color resist regions connected thereto. A projection of the first color resist region on the array substrate is located at two sides of the sub-pixel circuit. Each second color resist region is located above the at least two thin-film transistors; the second color resist layer is stacked above the second color resist region. The first color resist layer will not crack, and the main region spacer can reach a desired height.

Abstract: A liquid crystal display panel and a manufacturing method are disclosed. The panel includes: an array substrate, a passivation layer, a planarization layer, a black photo spacer (BPS) material layer and a first alignment layer which are sequentially stacked on the array substrate, wherein a projection of the first alignment layer on the BPS material layer does not exceed a region of the BPS material layer; wherein the BPS material layer is provided with multiple grooves, the multiple grooves are distributed along an inner side of an edge of the BPS material layer, a sealant is formed on the BPS material layer; wherein the sealant and the first alignment layer are respectively located at two sides of the multiple grooves. The present invention does not prepare retaining walls on the array substrate, and the flow of the sealant and the first alignment layer can also be blocked.

Abstract: A liquid crystal display panel is provided. The panel includes an array substrate; a passivation layer disposed on the array substrate; and a planarization layer disposed on the passivation layer; wherein the planarization layer is provided with multiple first common electrodes, and the array substrate is provided with a second common electrode for shielding light, and the second common electrode is located at an edge location of an active area region of the liquid crystal display panel, the second common electrode extends to an inner side and/or an outer side of the active area region, and an outermost first common electrode of the multiple first common electrodes and the second common electrode are electrically connected. The invention provides a liquid crystal display panel, which can solve the problem of light leakage at the edge of the active area region of the liquid crystal display panel.

Abstract: A liquid crystal display panel and a manufacturing method are disclosed. The panel includes: an array substrate, a passivation layer, a planarization layer, a black photo spacer (BPS) material layer and a first alignment layer which are sequentially stacked on the array substrate, wherein a projection of the first alignment layer on the BPS material layer does not exceed a region of the BPS material layer; wherein the BPS material layer is provided with multiple grooves, the multiple grooves are distributed along an inner side of an edge of the BPS material layer, a sealant is formed on the BPS material layer; wherein the sealant and the first alignment layer are respectively located at two sides of the multiple grooves. The present invention does not prepare retaining walls on the array substrate, and the flow of the sealant and the first alignment layer can also be blocked.

Abstract: This invention discloses a pixel structure comprising: a scan line, and a data line, being crossed with the scan line to define a pixel unit. The pixel unit comprises a pixel electrode including a main body portion and a peripheral portion; a pixel driving element; and a common electrode disposed in an overlay structure with the pixel electrode. The common electrode forms a storage capacitor with the pixel electrode, and includes an outside portion adjacent to the data or scan line. The pixel electrode further includes an extension portion located outside the peripheral portion. The extension portion electrically connects the peripheral portion and forms an evading hole therebetween. The outside portion of the common electrode corresponds to the evading hole. The present invention further discloses a liquid crystal display panel. This invention has advantages of increasing the capacity of the storage capacitor and improving the parasitic capacitance and dark veins.