Patents by Inventor Yanxia Lin

Yanxia Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Method for programming in non-volatile memory device by applying multiple bitline bias voltages
    Patent number: 10796777
    Abstract: Programming in a non-volatile memory device includes applying at least one programming pulse to a non-volatile memory cell during a first programming loop; applying at least one programming pulse to the non-volatile memory cell during a second programming loop succeeding the first programming loop; and providing a bitline bias voltage of the non-volatile memory cell according to a result of comparing a threshold voltage of the non-volatile memory cell in the first programming loop with a low verify level and/or a high verify level of a target data state of the non-volatile memory cell and a result of comparing a threshold voltage of the non-volatile memory cell in the second programming loop with the low verify level and/or the high verify level of the target data state of the non-volatile memory cell.
    Type: Grant
    Filed: May 7, 2019
    Date of Patent: October 6, 2020
    Assignee: Yangtze Memory Technologies Co., Ltd.
    Inventors: Haibo Li, Chao Zhang, Yanxia Lin
  • METHOD FOR PROGRAMMING IN NON-VOLATILE MEMORY DEVICE BY APPLYING MULTIPLE BITLINE BIAS VOLTAGES
    Publication number: 20200312417
    Abstract: Programming in a non-volatile memory device includes applying at least one programming pulse to a non-volatile memory cell during a first programming loop; applying at least one programming pulse to the non-volatile memory cell during a second programming loop succeeding the first programming loop; and providing a bitline bias voltage of the non-volatile memory cell according to a result of comparing a threshold voltage of the non-volatile memory cell in the first programming loop with a low verify level and/or a high verify level of a target data state of the non-volatile memory cell and a result of comparing a threshold voltage of the non-volatile memory cell in the second programming loop with the low verify level and/or the high verify level of the target data state of the non-volatile memory cell.
    Type: Application
    Filed: May 7, 2019
    Publication date: October 1, 2020
    Inventors: Haibo Li, Chao Zhang, Yanxia Lin