Patents by Inventor Yanyan Qiao

Yanyan Qiao has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6636109
    Abstract: An amplification circuit of the present invention includes a first MOS transistor having a gate to which a first input terminal for inputting a positive logic input signal or a reference potential is connected and a drain to which a first load is connected, a second MOS transistor having a gate to which a second input terminal for inputting a negative logic input signal, which composes differential input signals with the positive logic signal, or the reference potential is connected and a drain to which an output terminal and a second load are connected, and pairing up with the first MOS transistor, and a current source to which sources of the first and second MOS transistors are connected, for supplying a constant current when the difference in voltage between the first and second input terminals is in a predetermined range, and varying the current to be supplied when the difference in voltage is beyond the predetermined range.
    Type: Grant
    Filed: March 13, 2002
    Date of Patent: October 21, 2003
    Assignee: Fujitsu Limited
    Inventors: Naoaki Naka, Junko Nakamoto, Yanyan Qiao
  • Publication number: 20030042973
    Abstract: An amplification circuit of the present invention includes a first MOS transistor having a gate to which a first input terminal for inputting a positive logic input signal or a reference potential is connected and a drain to which a first load is connected, a second MOS transistor having a gate to which a second input terminal for inputting a negative logic input signal, which composes differential input signals with the positive logic signal, or the reference potential is connected and a drain to which an output terminal and a second load are connected, and pairing up with the first MOS transistor, and a current source to which sources of the first and second MOS transistors are connected, for supplying a constant current when the difference in voltage between the first and second input terminals is in a predetermined range, and varying the current to be supplied when the difference in voltage is beyond the predetermined range.
    Type: Application
    Filed: March 13, 2002
    Publication date: March 6, 2003
    Applicant: Fujitsu Limited
    Inventors: Naoaki Naka, Junko Nakamoto, Yanyan Qiao