Abstract: An array substrate includes a substrate, signal lines, conductive bumps, an insulating layer, and thin film transistors each including a gate, source, and drain. The conductive blocks are disposed on a portion of the substrate located in a bonding region. The insulating layer is located between every two adjacent conductive bumps. A distance from a surface of a conductive metal layer included in a conductive bump away from the substrate to the substrate is less than or equal to a distance from a surface of the insulating layer away from the substrate to the substrate. The gate and signal lines are disposed in a same layer. The conductive metal layer is disposed in a same layer as the source and drain. On the substrate, an orthogonal projection of the conductive metal layer is located within an orthogonal projection of a signal line connected to the conductive metal layer.

Abstract: An array substrate has a display area and a bezel area located on at least one side of the display area. The bezel area includes a bonding region. The array substrate includes a substrate, a plurality of signal lines, a plurality of conductive bumps, and an insulating layer. The signal lines are disposed on the substrate. The conductive blocks are disposed on a portion of the substrate located in the bonding region, and a conductive bump is connected to at least one signal line. The insulating layer covers the plurality of signal lines and is located between every two adjacent conductive bumps. The conductive bump includes a conductive metal layer. A distance from a surface of the conductive metal layer away from the substrate to the substrate is less than or equal to a distance from a surface of the insulating layer away from the substrate to the substrate.

Abstract: A pixel electrode, including: a plurality of strip-shaped first electrodes, where the plurality of the first electrodes are arranged along a first direction, each of the first electrodes extends along a second direction, and the second direction intersects with the first direction; a second electrode, where the second electrode is connected to first ends of the plurality of first electrodes, and the first ends of the plurality of first electrodes are connected through the second electrode; and a third electrode, where the third electrode is connected to a second end of at least one of the first electrodes, and a direction of an electric field of an area in which the third electrode is disposed intersects with both the first direction and the second direction.

Abstract: A pixel electrode, including: a plurality of strip-shaped first electrodes, where the plurality of the first electrodes are arranged along a first direction, each of the first electrodes extends along a second direction, and the second direction intersects with the first direction; a second electrode, where the second electrode is connected to first ends of the plurality of first electrodes, and the first ends of the plurality of first electrodes are connected through the second electrode; and a third electrode, where the third electrode is connected to a second end of at least one of the first electrodes, and a direction of an electric field of an area in which the third electrode is disposed intersects with both the first direction and the second direction.

Abstract: Provided is a pixel structure. The pixel structure includes: a first electrode, a second electrode, and a liquid crystal layer that are disposed on one side of a substrate and successively stacked, wherein one of the first electrode and the second electrode is a pixel electrode and the other of the first electrode and the second electrode is a common electrode, and the second electrode includes a plurality of electrode branches sequentially arranged in a first direction, wherein each of the electrode branches includes a first end portion, a body portion, and a second end portion that are successively connected in a second direction, the body portion including at least one body segment.

Abstract: An array substrate has a display area and a bezel area located on at least one side of the display area. The bezel area includes a bonding region. The array substrate includes a substrate, a plurality of signal lines, a plurality of conductive bumps, and an insulating layer. The signal lines are disposed on the substrate. The conductive blocks are disposed on a portion of the substrate located in the bonding region, and a conductive bump is connected to at least one signal line. The insulating layer covers the plurality of signal lines and is located between every two adjacent conductive bumps. The conductive bump includes a conductive metal layer. A distance from a surface of the conductive metal layer away from the substrate to the substrate is less than or equal to a distance from a surface of the insulating layer away from the substrate to the substrate.