Abstract: A semiconductor light-emitting device includes a semiconductor stack including a first semiconductor layer and a second semiconductor layer; a first reflective layer formed on the first semiconductor layer and including a plurality of vias; a plurality of contact structures respectively filled in the vias and electrically connected to the first semiconductor layer; a second reflective layer including metal material formed on the first reflective layer and contacting the contact structures; a plurality of conductive vias surrounded by the semiconductor stack; a connecting layer formed in the conductive vias and electrically connected to the second semiconductor layer; a first pad portion electrically connected to the second semiconductor layer; and a second pad portion electrically connected to the first semiconductor layer, wherein a shortest distance between two of the conductive vias is larger than a shortest distance between the first pad portion and the second pad portion.

Abstract: An exercise intensity assessing system includes a physiological information sensor, a signal transmitter connected with the physiological information sensor, a central control host connected with the signal transmitter, and a cloud database connected with the central control host. The physiological information sensor senses physiological information of an exerciser before and after the exerciser exercises. The physiological information is transmitted by the signal transmitter to the central control host, and transmitted by the central control host to the cloud database for being diagnosed and analyzed by a fitness instructor. The cloud database obtains a forecasted watt value corresponding to the physiological information, and obtains a resistance level of different fitness apparatuses according to the forecasted watt value.

Abstract: An intelligent exercise intensity assessing system includes an exercise testing machine, a physiological information sensor, a signal transmitter connected with the physiological information sensor, a central control host connected with the signal transmitter, and a cloud database connected with the central control host. The physiological information sensor senses physiological information of an exerciser before and after the exerciser operates the exercise testing machine. The physiological information is transmitted by the signal transmitter to the central control host, and transmitted by the central control host to the cloud database. The cloud database analyzes the physiological information to obtain a corresponding forecasted watt value, and obtains a resistance level of different fitness apparatuses according to the forecasted watt value.

Abstract: Mapping-aware coding tools for 360 degree videos adapt conventional video coding tools for 360 degree video data using parameters related to a spherical projection of the 360 degree video data. The mapping-aware coding tools perform motion vector mapping techniques, adaptive motion search pattern techniques, adaptive interpolation filter selection techniques, and adaptive block partitioning techniques. Motion vector mapping includes calculating a motion vector for a pixel of a current block by mapping the location of the pixel within a two-dimensional plane (e.g., video frame) onto a sphere and mapping a predicted location of the pixel on the sphere determined based on rotation parameters back onto the plane. Adaptive motion searching, adaptive interpolation filter selection, and adaptive block partitioning operate according to density distortion based on locations along the sphere.

Abstract: The present invention discloses a decorated tree bracket base. A locking seat is installed on an upper sleeve, the locking seat has a sleeve structure, and an inserting through hole which is the same as a center hole of the supporting tube shaft is formed in the locking seat; a plurality of elastic clamping strips are formed on the lower hole edge of the inserting through hole, and the upper end of each elastic clamping strip is connected with the lower hole edge of the inserting through hole by a single point. An elastic clamping structure can not only realize the effect of fixing the trunk of the decorated tree, but also provide a simpler and more efficient installation method and a low installation difficulty, which is more in line with the current market demand.

Abstract: The present invention discloses a decorated tree connecting device, a quick-connect decorated tree bracket and a wiring method therefor, which are used in the trunk structure of a decorated tree, comprising an upper connecting socket and a lower connecting socket; and when the upper connecting socket and the lower connecting socket are fitted by insertion, the connection point of an elastic copper connecting piece is in contact with a corresponding copper connecting piece, realizing the electrical connection fit of the upper connecting socket and the lower connecting socket.

Abstract: A recipe verifying method, a recipe verifying server, and a smart manufacturing controlling system using the same are provided. The recipe verifying method includes the following steps. An inputting recipe having a plurality of inputting parameters is intercepted. The inputting recipe is transmitted from one of the inspection apparatuses. A target best known method (BKM) recipe is searched out from a plurality of candidate BKM recipes according to the inputting recipe. A plurality of predetermined limitations are obtained according to the target BKM recipe. Whether the inputting parameters of the inputting recipe meet the predetermined limitations is determined. An error report is generated, if the inputting parameters of the inputting recipe do not meet the predetermined limitations. At least one error is heighted in the error report.

Abstract: A memory controller includes a buffer memory and a microprocessor. The buffer memory includes at least a first cache memory and a second cache memory. The microprocessor is configured to control access of a flash memory device. The microprocessor is configured to obtain a number of spare blocks of the flash memory device corresponding to a first operation period, determine a write speed compensation value, determine a target write speed according to the write speed compensation value and a balance speed, and determine a target garbage collection speed according to the target write speed. The microprocessor is further configured to perform one or more write operations in response to one or more write commands received from a host device in the first operation period according to the target write speed and perform at least one garbage collection operation according to the target garbage collection speed.

Abstract: The present invention provides a method for managing a flash memory module, wherein the method comprises the steps of: grouping a plurality of blocks within the flash memory module into a plurality of groups, wherein each group comprises at least two blocks; establishing a valid page table, wherein the valid page table records indexes of the plurality of blocks and corresponding numbers of valid pages, respectively; establishing a group minimum valid page array based on the valid page table; referring to the group minimum valid page array to select a target group having a global minimum valid page, wherein the global minimum valid pages is obtained by selecting a minimum value among the minimum valid pages of the groups; searching the at least two blocks within the target group to determine a target block having the global minimum valid pages; and adding the target block into a garbage collection queue.

Abstract: A microcoil element, an array-type microcoil element and a device are provided. The microcoil element includes a wiring layer having continuous multiple metal line segments that form multiple loops around a starting point of the element. Every metal line segment includes a first electrode end and a second electrode end. The microcoil element includes an electrode layer having a first electrode zone and a second electrode zone that respectively collect the first electrode ends and the second electrode ends of the multiple metal line segments. When designing the microcoil element, parameters such as a total length of the multiple line segments, a line width, a line spacing of adjacent line segments, a length of each line segment, turns of the microcoil, and a loop distance according to impedance requirement. The single microcoil element or the array-type microcoil element can be used as a magnetic component of a device.

Abstract: A high frequency connector includes a case, a circuit board, a component protecting member and a cable. The circuit board is configured in the case and includes an electronic component and a plurality of solder pads. The component protecting member includes a case body and is configured on the circuit board. One side of the case body has an opening, and a containing space is formed between the opening and the inner face of the case body. A crossing structure is formed by the outer surface of the other side of the case body. When the component protecting member is configured on the circuit board, the component protecting member covers the electronic component in the containing space to maintain the transmission characteristics of the electronic component.

Abstract: The present invention provides a method for managing a flash memory module, wherein the method includes the steps of: grouping a plurality of blocks within the flash memory module into a plurality of groups; scanning a target block of each group, without scanning all of the blocks within the group, to determine if at least a portion of blocks of the group needs to be refreshed, wherein the group that is determined that at least the portion of blocks needs to be refreshed is marked as a marked group; only scanning at least the portion of blocks of the marked group, without scanning the groups that is not marked, to determine which block needs to be refreshed, wherein the block that is determined to be refreshed is marked as a marked block; refreshing the marked block(s) by moving valid data of the marked block(s) to at least one blank block.

Abstract: The present invention provides a method for managing a flash memory module, wherein the method includes the steps of: grouping a plurality of blocks within the flash memory module into a plurality of groups; scanning a target block of each group, without scanning all of the blocks within the group, to determine if at least a portion of blocks of the group needs to be refreshed, wherein the group that is determined that at least the portion of blocks needs to be refreshed is marked as a marked group; only scanning at least the portion of blocks of the marked group, without scanning the groups that is not marked, to determine which block needs to be refreshed, wherein the block that is determined to be refreshed is marked as a marked block; refreshing the marked block(s) by moving valid data of the marked block(s) to at least one blank block.

Abstract: A memory controller includes a buffer memory and a microprocessor. The buffer memory includes at least a first cache memory and a second cache memory. The microprocessor is configured to control access of a flash memory device. The microprocessor is configured to obtain a number of spare blocks of the flash memory device corresponding to a first operation period, determine a write speed compensation value, determine a target write speed according to the write speed compensation value and a balance speed, and determine a target garbage collection speed according to the target write speed. The microprocessor is further configured to perform one or more write operations in response to one or more write commands received from a host device in the first operation period according to the target write speed and perform at least one garbage collection operation according to the target garbage collection speed.

Abstract: A method for orchestrating resources in a multi-access edge computing (MEC) network is applied in and by an apparatus. The MEC network comprises at least one control node, substrate nodes and substrate links managed by the at least one control node. The apparatus receives a virtual network request and calculates whether a proper virtual network embedding solution for the virtual network request exists. If so, the apparatus hands the solution over to the at least one control node for implementation.

Abstract: A method for orchestrating resources in a multi-access edge computing (MEC) network is applied in and by an apparatus. The MEC network comprises at least one control node, substrate nodes and substrate links managed by the at least one control node. The apparatus receives a virtual network request and calculates whether a proper virtual network embedding solution for the virtual network request exists. If so, the apparatus hands the solution over to the at least one control node for implementation.

Abstract: A method for recording a duration of use of a data block is disclosed, as well as a data storage device implementing that method. The data block is either an in-use data block or an empty data block. The method includes steps of: receiving and writing data into one of the in-use data blocks and writing a program time and a time interval of the data into the in-use data block. Wherein the time interval is a difference between the program time and an initial program time of the in-use data block, and the initial program time was recorded when the in-use data block wrote a first piece of data.

Abstract: A high frequency connector includes a case, a circuit board, a component protecting member and a cable. The circuit board is configured in the case and includes an electronic component and a plurality of solder pads. The component protecting member includes a case body and is configured on the circuit board. One side of the case body has an opening, and a containing space is formed between the opening and the inner face of the case body. A crossing structure is formed by the outer surface of the other side of the case body. When the component protecting member is configured on the circuit board, the component protecting member covers the electronic component in the containing space to maintain the transmission characteristics of the electronic component.

Abstract: A data storage device includes a flash memory, a controller and a random-access memory. The flash memory includes a plurality of blocks, and each of the blocks includes a plurality of pages. The controller divides the pages of the blocks into a plurality of super pages which include a plurality of first pages and a plurality of second pages. The controller writes at least one super page data to one of the first pages, generates a parity code based on the at least one super page data, and stores the parity code on the random-access memory.

Abstract: An electronic device includes a circuit board and a conductive piece. The circuit board includes a hole and a grounding pad close to the hole. The conductive piece includes an insertion component and an enlarged grounding portion connected to the insertion component. The insertion component of the conductive piece is inserted into the hole of the circuit board and is electrically connected to the grounding pad, and a size of the enlarged grounding portion is larger than that of the hole.