Patents by Inventor Yao HONG
Yao HONG has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20190207148Abstract: A wiring method for a special-shaped OLED product includes: forming an isolation pillar layer on an insulation layer, wherein the insulation layer includes an insulation layer of a display portion and an insulation layer of a frame portion, the isolation pillar layer includes an isolation pillar layer of the display portion and an isolation pillar layer of the frame portion, and the insulation layer of the frame portion is covered by the isolation pillar layer of the frame portion; forming a cathode material layer on the isolation pillar layer, wherein the cathode material layer includes a cathode material layer of the display portion and a cathode material layer of the frame portion, the cathode material layer of the frame portion is located between isolation pillars of the isolation pillar layer of the frame portion, and the cathode material layer of the frame portion is used as a cathode.Type: ApplicationFiled: January 10, 2019Publication date: July 4, 2019Inventors: Lijuan PENG, Gaomin LI, Yao HONG
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Publication number: 20190200311Abstract: Example embodiments relate to transceiver devices with real-time clocks. One embodiment includes a transceiver device. The transceiver device includes a real-time clock arranged for providing a clock signal. The transceiver device also includes a receiving section. The receiving section includes a main receiver arranged for receiving communication signals. The receiving section also includes a wake-up receiver. The wake-up receiver is arranged for receiving a calibration signal that includes clock timing information containing a time stamp. The wake-up receiver is also arranged for adjusting the real-time clock based on the clock timing information.Type: ApplicationFiled: December 4, 2018Publication date: June 27, 2019Inventor: Yao-Hong Liu
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Publication number: 20190158080Abstract: A variable delay circuit, which includes a digital-to-time converter (DTC) circuit and a controller, is disclosed. The DTC circuit includes a plurality of capacitors and a plurality of MOS switches that are turned on and off according to a control code. The DTC circuit receives an input pulse, applies a delay corresponding to the control code to the edge to be delayed, and outputs a delay pulse. The controller supplies a valid code indicating a delay amount as a control code during a period beginning from a predetermined time TCONST before the edge (positive edge) to be delayed of an input pulse REF up to the edge to be delayed. Further, the controller supplies, as the control code, a dummy code for turning on all of the plurality of MOS switches inside the DTC circuit immediately before the period.Type: ApplicationFiled: November 16, 2018Publication date: May 23, 2019Inventors: Takashi Kuramochi, Yao Hong Liu
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Patent number: 10236894Abstract: The present disclosure relates to a Digital Phase Locked Loop (DPLL) for phase locking an output signal to a reference clock signal. The DPLL comprises a phase detector for detecting a phase error of a feedback signal with respect to the reference clock signal. The DPLL comprises a digitally controlled oscillator for generating the output signal based at least on a frequency control word and at least one control signal representative of the phase error. The phase detector comprises an integer circuit for generating a first control signal representative of an integer phase error. The phase detector comprises a fractional circuit comprising a Time-to-Digital Converter (TDC) for processing the feedback signal and a delayed reference clock signal. The fractional circuit is provided for generating from the TDC output a second control signal representative of a fractional phase error. The DPLL comprises an unwrapping unit for unwrapping the TDC output.Type: GrantFiled: August 28, 2017Date of Patent: March 19, 2019Assignee: Stichting IMEC NederlandInventors: Johan van den Heuvel, Yao-Hong Liu
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Publication number: 20190070718Abstract: A pneumatic stapler has a main body internally loaded with straight staple-forming wires and including a staple-driving and a wire-bending control chamber. A staple-driving element carrier is movably mounted in the staple-driving control chamber and divides the latter into a first and a second staple-driving gas flowing space. When the staple-driving element carrier moves in the second staple-driving gas flowing space to push one staple out of the main body into a workpiece, the initially isolated first staple-driving control chamber is now communicable with the wire-bending control chamber, allowing part of the gas supplied to the pneumatic stapler to flow into the wire-bending control chamber and move a wire-bending element mounted therein to bend one staple-forming wire into a staple. Therefore, the pneumatic stapler requires only one pressure source to complete both staple-driving and wire-bending operations and can have more staple-forming wires loaded therein to provide high convenience in use.Type: ApplicationFiled: July 24, 2018Publication date: March 7, 2019Applicant: PATEK PNEUMATICS CO., LTD.Inventors: Hsien Cheng CHEN, Yao Hong WANG
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Patent number: 10200047Abstract: The disclosure provides a phase locked loop, PLL, for phase locking an output signal to a reference signal. The PLL comprises a reference path providing the reference signal to a first input of a phase detector, a feedback loop providing the output signal of the PLL as a feedback signal to a second input of the phase detector, a controllable oscillator generating the output signal based on at least a phase difference between reference and feedback signal, a digital-to-time converter, DTC, delaying a signal that is provided at one of the first and second input, a delay calculation path for calculating a DTC delay value. The PLL further comprises a randomization unit for generating and adding a random offset, i.e. a pseudo-random integer, to the delay value. The offset is such that a target output of the phase detector remains substantially unchanged.Type: GrantFiled: May 25, 2017Date of Patent: February 5, 2019Assignees: IMEC VZW, Stichting IMEC Nederland, Vrije Universiteit BrusselInventors: Nereo Markulic, Yao-Hong Liu, Jan Craninckx
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Patent number: 10162455Abstract: An FPC of a capacitive touchscreen and a method for mounting the FPC. The FPC comprises a sensing circuit and a driving circuit which respectively matches with a sensing circuit layer and a driving circuit layer of a capacitive touchscreen panel and have several contacts for matching the sensing circuit layer and the driving circuit layer for corresponding connection; an IC driving chip, disposed between the sensing circuit and the driving circuit. The sensing circuit and the driving circuit are disposed in parallel or on the same line. The sensing circuit or the driving circuit is provided with a bending area, and the sensing circuit or the driving circuit is able to be turned towards the driving circuit or the sensing circuit, so as to allow the sensing circuit to match the sensing circuit layer and allow the driving circuit to match the driving circuit layer.Type: GrantFiled: December 23, 2014Date of Patent: December 25, 2018Assignee: Kunshan Visionox Display Co., Ltd.Inventors: Weiwei Liu, Yao Hong
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Publication number: 20180235481Abstract: A method of detecting a vital sign comprising at least one of a heart rate and a respiratory rate of a subject is provided. In one aspect, the method includes transmitting a radio frequency signal towards the subject; and receiving a reflected signal from the subject, wherein the transmitted signal is reflected by the subject and Doppler-shifted due to at least one of the heart rate and the respiratory rate to form the reflected signal. The method also includes mixing the reflected signal with a first reference signal; and providing a vital sign carrying signal based on the mixing to a first input of a phase or frequency comparator. The method further includes generating an adjustable second reference signal and providing the reference signal to a second input of the phase or frequency comparator; and generating an output signal, by the phase or frequency comparator.Type: ApplicationFiled: February 12, 2018Publication date: August 23, 2018Inventors: Yao-Hong Liu, Marco Mercuri
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Patent number: 9929885Abstract: The present disclosure relates to a method for demodulating a modulated signal and a receiver. The receiver comprises: a phase detector with a first and second input, the first input being adapted to receive a modulated input signal; a comparator comprising an input coupled to an output of the phase detector; a frequency-offset cancellation block comprising an input coupled to an output of the comparator. The receiver includes a digitally controlled oscillator comprising: a control input coupled to an output of the comparator and an output of the frequency-offset cancellation block; and an output coupled to the second input of the phase detector.Type: GrantFiled: December 15, 2016Date of Patent: March 27, 2018Assignee: Stichting IMEC NederlandInventors: Vijay Kumar Purushothaman, Yao-Hong Liu, Robert Bogdan Staszewski
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Publication number: 20180062660Abstract: The present disclosure relates to a Digital Phase Locked Loop (DPLL) for phase locking an output signal to a reference clock signal. The DPLL comprises a phase detector for detecting a phase error of a feedback signal with respect to the reference clock signal. The DPLL comprises a digitally controlled oscillator for generating the output signal based at least on a frequency control word and at least one control signal representative of the phase error. The phase detector comprises an integer circuit for generating a first control signal representative of an integer phase error. The phase detector comprises a fractional circuit comprising a Time-to-Digital Converter (TDC) for processing the feedback signal and a delayed reference clock signal. The fractional circuit is provided for generating from the TDC output a second control signal representative of a fractional phase error. The DPLL comprises an unwrapping unit for unwrapping the TDC output.Type: ApplicationFiled: August 28, 2017Publication date: March 1, 2018Applicant: Stichting IMEC NederlandInventors: Johan van den Heuvel, Yao-Hong Liu
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Publication number: 20180019591Abstract: Disclosed is a multi-layer electric shock protection EMI filter device and a manufacturing method thereof. The multi-layer electric shock protection EMI filter device is formed by cofiring a laminated ceramic dielectric material layer, and includes: a lower capacitor, an electric shock protection device, and a upper capacitor; wherein the electric shock protection device is disposed between the lower capacitor and the upper capacitor, and isolated from the lower capacitor and the upper capacitor by a ceramic dielectric material layer, and a tripping layer is provided between two wires in the electric shock protection device, and formed by a mix of SiC and glass. After the main body is stacked and a low temperature cofire process is performed, the tripping layer becomes a compound structure of a SiC body and an air gap. Accordingly, an integrated electric shock protection EMI filter device can be manufactured to prevent electromagnetic interference, filter, and electric shock.Type: ApplicationFiled: July 13, 2016Publication date: January 18, 2018Inventors: Yao-Hong CHAN, Chin-Hung CHENG, Wei-Cheng WU, Chin-Chuan CHO
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Publication number: 20170346493Abstract: The disclosure provides a phase locked loop, PLL, for phase locking an output signal to a reference signal. The PLL comprises a reference path providing the reference signal to a first input of a phase detector, a feedback loop providing the output signal of the PLL as a feedback signal to a second input of the phase detector, a controllable oscillator generating the output signal based on at least a phase difference between reference and feedback signal, a digital-to-time converter, DTC, delaying a signal that is provided at one of the first and second input, a delay calculation path for calculating a DTC delay value. The PLL further comprises a randomization unit for generating and adding a random offset, i.e. a pseudo-random integer, to the delay value. The offset is such that a target output of the phase detector remains substantially unchanged.Type: ApplicationFiled: May 25, 2017Publication date: November 30, 2017Applicants: IMEC VZW, Stichting IMEC Nederland, Vrije Universiteit BrusselInventors: Nereo Markulic, Yao-Hong Liu, Jan Craninckx
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Patent number: 9774336Abstract: An all-digital-phase-locked-loop (ADPLL) includes a digitally controlled oscillator (DCO) arranged to generate a DCO output signal, and a feedback loop comprising a set of components for controlling the DCO. The set of components comprise: a time-to-digital converter (TDC) arranged to generate a TDC output code indicative of the phase difference between the reference signal and the enable signal measured within the predetermined observation window; a subset of components arranged to generate the enable signal from the DCO output signal; and an offset calibration system connected to the TDC output, which when activated is arranged to evaluate the difference between the first and second offset delay values by monitoring the TDC output code generated over a predetermined period of time, and to adjust the difference to position the predetermined observation window with respect to the reference signal.Type: GrantFiled: December 20, 2015Date of Patent: September 26, 2017Assignee: Stichting IMEC NederlandInventor: Yao-Hong Liu
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Publication number: 20170172425Abstract: A method for detecting at least one of a heart rate and a respiratory rate of a subject is disclosed. In one aspect, the method includes transmitting a radio frequency signal towards the subject and receiving a reflected signal from the subject, the reflected signal being Doppler-shifted due to at least one of the heart rate and the respiratory rate. The method also includes providing the reflected signal to a first input of a phase comparator and generating an adjustable reference signal by a reference signal generator. The method further includes providing the reference signal to a second input of the phase comparator and generating an output signal by the phase comparator based on the reflected signal and the reference signal. The method includes varying, by the reference signal generator, at least one of a phase and a frequency of the adjustable reference signal based on the output signal of the phase comparator to track a phase of the reflected signal.Type: ApplicationFiled: December 8, 2016Publication date: June 22, 2017Inventors: Yao-Hong Liu, Marco Mercuri
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Publication number: 20170180170Abstract: The present disclosure relates to a method for demodulating a modulated signal and a receiver. The receiver comprises: a phase detector with a first and second input, the first input being adapted to receive a modulated input signal; a comparator comprising an input coupled to an output of the phase detector; a frequency-offset cancellation block comprising an input coupled to an output of the comparator. The receiver includes a digitally controlled oscillator comprising: a control input coupled to an output of the comparator and an output of the frequency-offset cancellation block; and an output coupled to the second input of the phase detector.Type: ApplicationFiled: December 15, 2016Publication date: June 22, 2017Applicant: Stichting IMEC NederlandInventors: Vijay Kumar Purushothaman, Yao-Hong Liu, Robert Bogdan Staszewski
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Patent number: 9641368Abstract: The present disclosure relates to a front-end system for a radio device. In one example, a front-end system comprises a converter, the converter comprising a mixer configured for down-converting a radio frequency signal into a baseband signal by using a local oscillator signal generated by a signal generator, and characterized in that, the converter further comprises a quantizer arranged for quantizing the baseband signal into a digital signal. Further, the signal generator may be configured for generating, based on the digital signal, the local oscillator signal such that it is synchronized with the radio frequency signal.Type: GrantFiled: February 3, 2015Date of Patent: May 2, 2017Assignee: STICHTING IMEC NEDERLANDInventors: Yao-Hong Liu, Wilhelmus Matthias Clemens Dolmans, Johannes Henricus Cornelus van den Heuvel
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Patent number: 9598793Abstract: An electrospinning device includes a rotatable carrier, a collector unit including at least one collector bar, a dispenser for dispensing a polymer composition, and a power supply. The collector bar is disposed on the rotatable carrier and is rotatable about a longitudinal axis. The power supply is configured to produce a potential difference between the dispenser and the collector bar so as to permit the polymer composition to erupt from the dispenser as a jet of the polymer composition toward the collector bar to thereby permit the resultant electrospun fibers to be collected on the collector bar. By rotating the rotatable carrier at a relatively fast speed, the electrospun fibers are drawn to be arranged along the longitudinal axis.Type: GrantFiled: October 30, 2015Date of Patent: March 21, 2017Assignee: NATIONAL CHIAO TUNG UNIVERSITYInventors: Ray-Quen Hsu, Hsuan-Yu Huang, Yao-Hong Cheng
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Publication number: 20170003801Abstract: An FPC of a capacitive touchscreen and a method for mounting the FPC. The FPC comprises a sensing circuit and a driving circuit which respectively matches with a sensing circuit layer and a driving circuit layer of a capacitive touchscreen panel and have several contacts for matching the sensing circuit layer and the driving circuit layer for corresponding connection; an IC driving chip, disposed between the sensing circuit and the driving circuit. The sensing circuit and the driving circuit are disposed in parallel or on the same line. The sensing circuit or the driving circuit is provided with a bending area, and the sensing circuit or the driving circuit is able to be turned towards the driving circuit or the sensing circuit, so as to allow the sensing circuit to match the sensing circuit layer and allow the driving circuit to match the driving circuit layer.Type: ApplicationFiled: December 23, 2014Publication date: January 5, 2017Inventors: Weiwei LIU, Yao HONG
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Publication number: 20170003820Abstract: A capacitive touchscreen panel and a method for etching an indium tin oxide film on a gap portion of a capacitive touchscreen panel, the method for etching comprises using a laser etching line to cut ITO on the gap portion into a plurality of ITO segments, the ITO segments are independent of each other and are not connected to each other. The method for etching an indium tin oxide film on a capacitive touchscreen panel and a gap portion thereof of the present invention has high production efficiency, and the touchscreen product has a good display effect after etching.Type: ApplicationFiled: December 23, 2014Publication date: January 5, 2017Inventors: Leping AN, Yao HONG, Long WANG, Ming GAO, Peisheng YOU
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Publication number: 20160348278Abstract: An electrospinning device includes a rotatable carrier, a collector unit including at least one collector bar, a dispenser for dispensing a polymer composition, and a power supply. The collector bar is disposed on the rotatable carrier and is rotatable about a longitudinal axis. The power supply is configured to produce a potential difference between the dispenser and the collector bar so as to permit the polymer composition to erupt from the dispenser as a jet of the polymer composition toward the collector bar to thereby permit the resultant electrospun fibers to be collected on the collector bar. By rotating the rotatable carrier at a relatively fast speed, the electrospun fibers are drawn to be arranged along the longitudinal axis.Type: ApplicationFiled: October 30, 2015Publication date: December 1, 2016Inventors: Ray-Quen Hsu, Hsuan-Yu Huang, Yao-Hong Cheng