Patents by Inventor Yao Liu

Yao Liu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230095610
    Abstract: An integrated circuit chip device and related products are provided. The integrated circuit chip device is used for performing a multiplication operation, a convolution operation, or a training operation of a neural network. The device has the advantages of small calculation amount and low power consumption.
    Type: Application
    Filed: December 2, 2022
    Publication date: March 30, 2023
    Applicant: Cambricon Technologies Corporation Limited
    Inventors: Shaoli LIU, Xinkai SONG, Bingrui WANG, Yao ZHANG, Shuai HU
  • Patent number: 11613784
    Abstract: The present invention provides methods of detecting ultraviolet radiation (UVR)-induced skin damage in a subject. The method includes the steps of: a) obtaining a skin sample from the subject; b) analyzing expression levels in the skin sample of UVR-induced differentially expressed genes (DEGs) listed in Table 8 or a subset thereof; and c) comparing the expression levels of the UVR-induced DEGs to a control skin sample; wherein, when the expression levels of the UVR-induced DEGs in the skin sample is above or below the level of each of the UVR-induced DEGs in the control sample, the subject is identified as likely being afflicted with UVR-induced skin damage. Also provided are methods for measuring the effectiveness of a test agent in reducing ultraviolet radiation (UVR)-induced damage.
    Type: Grant
    Filed: March 16, 2017
    Date of Patent: March 28, 2023
    Assignee: THE TRUSTEES OF COLUMBIA UNIVERSITY IN THE CITY OF NEW YORK
    Inventors: Liang Liu, Yao Shen
  • Publication number: 20230093762
    Abstract: A resonator, a filter and a duplexer, which relate to the technical field of resonators. The resonator includes: a substrate, and a lower electrode layer, a piezoelectric layer and an upper electrode layer, which are sequentially formed on the substrate, wherein an acoustic reflection structure is formed on a surface of the substrate that is close to the lower electrode layer, and an overlapping region of the acoustic reflection structure, the lower electrode layer, the piezoelectric layer and the upper electrode layer along a stacking direction forms a resonant region; and in the resonant region, the surface, which is away from the substrate, of at least one of the lower electrode layer, the piezoelectric layer and the upper electrode layer is etched to form an etched region, the depth of the etched region is less than the thickness of an etched layer, and the area of the etched region is less than the area of the resonant region.
    Type: Application
    Filed: September 21, 2022
    Publication date: March 23, 2023
    Inventors: Yang ZOU, Yan LIU, Yao CAI, Chengliang SUN, Bowoon SOON
  • Publication number: 20230093515
    Abstract: A synchronous buck converter using a single gate drive control is provided and includes a drive circuit, a p-type gallium nitride (p-GaN) transistor switch module and an inductor. A gallium nitride power transistor is used as an upper side transistor switch, and a PMOS power transistor is used as a lower side transistor switch in the p-GaN transistor switch module. A gate of the upper side transistor switch and a gate of the lower side transistor switch are coupled to each other and receive a switch signal provided by the drive circuit at the same time. By controlling the on and off of the upper side transistor switch and the lower side transistor switch, the problem of simultaneous activation of the upper and lower side transistor switches can be avoided.
    Type: Application
    Filed: December 1, 2021
    Publication date: March 23, 2023
    Inventors: Wei-Hua Chieng, Edward Yi Chang, Stone Cheng, Shyr-Long Jeng, Li-Chuan Tang, Chih-Chiang Wu, Ching-Yao Liu, Kuo-Bin Wang
  • Patent number: 11609342
    Abstract: In one embodiment, a method for calculating a location of an autonomous driving vehicle includes receiving new global navigation satellite system (GNSS) data. The method further includes identifying a first previously estimated location from a plurality of previously estimated locations with a timestamp that is closest to the timestamp of the new GNSS data and identifying a second previously estimated location from the plurality of previously estimated locations with a most recent timestamp. The method further includes calculating a difference between the first previously estimated location and the second previously estimated location, adjusting the new GNSS data based on the difference; and calculating a current estimated location of the ADV based on the adjusted GNSS data.
    Type: Grant
    Filed: March 5, 2020
    Date of Patent: March 21, 2023
    Assignees: BAIDU USA LLC, BAIDU.COM TIMES TECHNOLOGY (BEIJING) CO., LTD.
    Inventors: Yan Cui, Quanwei Liu, Yao Zhuo
  • Publication number: 20230079045
    Abstract: Provided are a compound of formula (I-a), an isomer thereof or a pharmaceutically acceptable salt thereof as a Hemagglutinin inhibitor, and a preparation method thereof. The compound is useful for preparing a medicament for treating a disease related to Hemagglutinin.
    Type: Application
    Filed: August 24, 2020
    Publication date: March 16, 2023
    Applicant: Sichuan Haisco Pharmaceutical Co., Ltd.
    Inventors: Yao Li, Lei Chen, Guobiao Zhang, Wenjing Wang, Zongjun Shi, Gang Hu, Haitao Huang, Haodong Wang, Bo Xu, Xiaobo Zhang, Guoliang LIU, Dengyu Zheng, Shilin Huang, Jianfei Zhao, Changwei Song, Chen Zhang, Fei Ye, Jia Ni, Pangke Yan
  • Publication number: 20230083444
    Abstract: A computer adjusts a set of presentation materials, comprising. The computer receives, from a source available to the computer, an initial set of presentation materials. The computer, in response to receiving the initial set of presentation materials, determines a reference presentation duration associated with initial set of presentation materials. The computer receives a target presentation duration from a target duration source available to the computer. The computer determines a presentation conversion value representing, at least in part, a ratio of the target presentation duration to the reference presentation duration. The computer applies a Machine Learning (ML) refactoring routine to revise the initial set of presentation materials in accordance, at least partially, with the presentation conversion value, thereby generating a refactored set of presentation materials having a revised conveyance duration substantially the same as the target duration.
    Type: Application
    Filed: September 15, 2021
    Publication date: March 16, 2023
    Inventors: Qiang Yao, Jian Jun Wang, Jonathan D. Dunne, Ziqiumin Wang, Fu Er Liu
  • Publication number: 20230072003
    Abstract: A system, method, and computer program product for implementing cognitive natural language processing software framework optimization is provided. The method includes receiving instructions associated with an audible user input of a user. An AI input intention of the user is determined and key information is extracted from the audible user input. The key information is inputted into a generated database table and additional key information is retrieved from a dialog table. A supplementary database table comprising the additional key information is generated and the key information is spliced with the additional key information. A resulting spliced data structure is merged into a final database table and natural language is converted into a request code structure within an SQL structure and an interactive AI interface presenting results of the converting is generated. Operational functionality of an AI device is enabled for audibly presenting results of the conversion.
    Type: Application
    Filed: September 7, 2021
    Publication date: March 9, 2023
    Inventors: Zhong Fang Yuan, Tong Liu, De Shuo Kong, Yao Chen, Hai Bo Zou, Sarbajit K. Rakshit, Zheng Jie
  • Publication number: 20230073399
    Abstract: A semiconductor package structure includes a semiconductor die, a redistribution layer (RDL) structure, a protective insulating layer, and a conductive structure. The semiconductor die has a first surface, a second surface opposite the first surface, and a third surface adjoined between the first surface and the second surface. The RDL structure is on the first surface of the semiconductor die and is electrically coupled to the semiconductor die. The protective insulating layer covers the RDL structure, the second surface and the third surface of the semiconductor die. The conductive structure passes through the protective insulating layer and is electrically coupled to the RDL structure.
    Type: Application
    Filed: November 17, 2022
    Publication date: March 9, 2023
    Applicant: MediaTek Inc.
    Inventors: Yen-Yao Chi, Nai-Wei Liu, Ta-Jen Yu, Tzu-Hung Lin, Wen-Sung Hsu, Shih-Chin Lin
  • Publication number: 20230076566
    Abstract: In a method executed in an exposure apparatus, a focus control effective region and a focus control exclusion region are set based on an exposure map and a chip area layout within an exposure area. Focus-leveling data are measured over a wafer. A photo resist layer on the wafer is exposed with an exposure light. When a chip area of a plurality of chip areas of the exposure area is located within an effective region of a wafer, the chip area is included in the focus control effective region, and when a part of or all of a chip area of the plurality of chip areas is located on or outside a periphery of the effective region of the wafer, the chip area is included in the focus control exclusion region In the exposing, a focus-leveling is controlled by using the focus-leveling data measured at the focus control effective region.
    Type: Application
    Filed: November 14, 2022
    Publication date: March 9, 2023
    Inventors: Yung-Yao LEE, Heng-Hsin LIU, Hung-Ming KUO, Jui-Chun PENG
  • Publication number: 20230076931
    Abstract: The present disclosure relates to a multiplier, a method, an integrated circuit chip, and a computation apparatus for a floating-point computation. The computation apparatus may be included in a combined processing apparatus, which may also include a general interconnection interface and other processing apparatus. The computation apparatus interacts with other processing apparatus to jointly complete computation operations specified by the user. The combined processing apparatus may also include a storage apparatus, which is respectively connected to the computation apparatus and other processing apparatus and is used for storing data of the computation apparatus and other processing apparatus.
    Type: Application
    Filed: October 13, 2020
    Publication date: March 9, 2023
    Inventors: Yao ZHANG, Shaoli LIU
  • Publication number: 20230067091
    Abstract: Disclosed are a method and apparatus for segment routing service processing, a routing device and a non-transitory computer-readable storage medium. The method for segment routing service processing may include acquiring service attribute information of a target node comprising an SR service node and an SR proxy node, and transmitting a notification message containing the service attribute information to a second SR node.
    Type: Application
    Filed: October 30, 2020
    Publication date: March 2, 2023
    Inventors: Yao LIU, Zheng ZHANG
  • Publication number: 20230067178
    Abstract: A device for clock control and related products are provided. The device includes a voltage detecting unit and a clock stretching unit. The voltage detecting unit is configured to detect a supply voltage at a target position in the processor, and output a voltage-alarm signal when the supply voltage is lower than or equal to a preset first threshold. The clock stretching unit is connected with the voltage detecting unit and configured to generate a second clock signal according to a first clock signal having a reference frequency in response to reception of the voltage-alarm signal, such that the processor uses the second clock signal to perform data processing. A frequency of the second clock signal is lower than the reference frequency.
    Type: Application
    Filed: January 4, 2021
    Publication date: March 2, 2023
    Inventors: Heng LIU, Song GAO, Yao ZHANG
  • Publication number: 20230065703
    Abstract: A torsion sensor, configured to sense torque generated or received by a joint actuator, is provided. The torsion sensor includes an inner ring, an outer ring, multiple radial bridging portions, multiple overload structures, and multiple strain sensing units. The inner ring and the outer ring are disposed on the same axis and are separated from each other. The torque enables the inner ring and the outer ring to relatively rotate with reference to the axis. The radial bridging portions are disposed at intervals and each radial bridging portion is connected between the inner ring and the outer ring along a radial direction, and each radial bridging portion has at least one depression. Each overload structure extends from the inner ring toward the outer ring along the radial direction and has at least one gap with the outer ring. The strain sensing units are respectively disposed on the radial bridging portions.
    Type: Application
    Filed: August 1, 2022
    Publication date: March 2, 2023
    Applicant: Coretronic Corporation
    Inventors: Shih-Wei Liu, Chi-Tang Hsieh, Yung-Yu Chang, Kuang-Yao Liu, Ming-Ju Chang
  • Publication number: 20230068596
    Abstract: A portable gas water maker comprises a water maker body with a shell having a hollow structure. A water inlet communicating with the shell and used for injecting water into the shell is formed at an upper end of the water maker body. The water maker body is inverted U-shaped, so that the lower half part of the water maker body is divided into a left cavity and a right cavity. One group of Peltier semiconductor assemblies is arranged in each of the left cavity and the right cavity. A front-end semiconductor and a rear-end semiconductor in each group of Peltier semiconductor assemblies are connected through a wire. The group of semiconductor assemblies in the left cavity is used for generating electricity, and the group of semiconductor assemblies in the right cavity is used for refrigeration.
    Type: Application
    Filed: August 23, 2022
    Publication date: March 2, 2023
    Applicant: XIJING UNIVERSITY
    Inventors: Kai CHEN, Qian ZHANG, Yao QIN, Xinfei LIU, Chenbo ZHANG, Wei ZHANG
  • Publication number: 20230053348
    Abstract: A method and apparatus for evaluating volumes of discharged hydrocarbon and externally charged hydrocarbon in a mud shale. The method comprises: determining a hydrogen index and a current hydrocarbon generation potential parameter of a mud shale in target block based on total organic carbon test data and pyrolysis analysis test data of the mud shale; determining an original hydrogen index of the mud shale based on the hydrogen index and the pyrolysis analysis test data; and evaluating a volume of discharged hydrocarbon and a volume of externally charged hydrocarbon in the mud shale based on the current hydrocarbon generation potential parameter and the original hydrogen index.
    Type: Application
    Filed: August 23, 2022
    Publication date: February 23, 2023
    Inventors: Tao HU, Xiongqi PANG, Fujie JIANG, Yuan LIU, Guanyun WU, Jiahao LYU, Zhenxue JIANG, Yao HU, Caijun LI, Chenxi ZHANG, Meiling HU, Renda HUANG
  • Publication number: 20230056550
    Abstract: An electronic device that has an antenna device that includes a conductive pattern layer comprising a first antenna element, the conductive pattern layer formed in an insulating substrate and adjacent to a first surface of the insulating substrate, and a second antenna element formed on a second surface of the insulating substrate opposite the first surface. The electronic device further has a semiconductor package that includes a redistribution layer (RDL) structure bonded and electrically connected to the conductive pattern layer, a first electronic component electrically connected to the RDL structure, and an encapsulating layer formed on the RDL structure and surrounding the first electronic component.
    Type: Application
    Filed: October 13, 2022
    Publication date: February 23, 2023
    Inventors: Yen-Yao CHI, Nai-Wei LIU, Tzu-Hung LIN
  • Patent number: 11585550
    Abstract: A control method and a control device for an air conditioner, the control method including: determining a current control mode of the air conditioner (S202), the control mode including at least a screen-independent mode configured to represent a mode, in which the air conditioner is independent of a display screen but can operates normally; when the control mode is the screen-independent mode, controlling the air conditioner to operate according to a current operating state (S204).
    Type: Grant
    Filed: December 28, 2017
    Date of Patent: February 21, 2023
    Assignees: GREE ELECTRIC APPLIANCES (WUHAN) CO., LTD, GREE ELECTRIC APPLIANCES, INC. OF ZHUHAI
    Inventors: Guohui Hu, Haibin Liu, Pei Qian, Yao Zhao, Luping Zhong, Xiantao Zhu, Zifeng Liang
  • Patent number: 11588006
    Abstract: A displaying region of a displaying backplane is delimited into a first displaying region and a second displaying region, the light transmittance of the first displaying region is less than that of the second displaying region, the displaying backplane has a metal signal line in a trace region, a plurality of sub-pixels located within the first displaying region are connected to a common cathode, and the common cathode is connected to the metal signal line. At least some of the sub-pixels located within the second displaying region are connected to independent cathodes, the independent cathodes are separate from each other, the displaying backplane further includes a first electrically conductive layer, and the independent cathodes are connected to the metal signal line via the first electrically conductive layer. The first electrically conductive layer is a planar electrode, and the orthographic projection of the planar electrode covers the second displaying region.
    Type: Grant
    Filed: June 15, 2021
    Date of Patent: February 21, 2023
    Assignees: Chengdu BOE Optoelectronics Technology Co., Ltd., BOE Technology Group Co., Ltd.
    Inventors: Yuanyou Qiu, Yao Huang, Weiyun Huang, Binyan Wang, Cong Liu
  • Patent number: 11586891
    Abstract: Provided are an integrated circuit chip apparatus and a related product, the integrated circuit chip apparatus being used for executing a multiplication operation, a convolution operation or a training operation of a neural network. The present technical solution has the advantages of a small amount of calculation and low power consumption.
    Type: Grant
    Filed: December 19, 2019
    Date of Patent: February 21, 2023
    Assignee: CAMBRICON TECHNOLOGIES CORPORATION LIMITED
    Inventors: Shaoli Liu, Xinkai Song, Bingrui Wang, Yao Zhang, Shuai Hu