Abstract: An integrated circuit (IC) structure includes a substrate having several regions, several semiconductor devices formed at the substrate and respectively within the regions, and an ultra-deep (UD) trench isolation structure formed in the substrate. The substrate has a top surface and a bottom surface oppositely, and the UD trench isolation structure formed in the substrate surrounds peripheries of each of the regions for structurally and physically isolating the semiconductor devices within different regions. The UD trench isolation structure penetrates the substrate by extending from the top surface of the substrate to the bottom surface of the substrate.

Abstract: A method for forming a thin film transistor (TFT) is disclosed. The invention uses metal electroless plating or chemical displacement processes to form metal clusters adjacent the sidewall of amorphous silicon active region pattern so as to crystallize the amorphous silicon amid the subsequently performed metal induced lateral crystallization (MILC) process. The amorphous silicon is crystallized to form polysilicon having parallel grains. Since the amorphous silicon will crystallize with a specific angle which is measured between the grain orientation and the side wall of the amorphous silicon, a tilt channel connecting the source and drain region of the TFT is utilized to upgrade the electron mobility across the tilt channel, wherein the grain orientation of polysilicon in the tilt channel perpendicular to a gate electrode which is subsequently formed above the tilt channel.